PowerPoint PresentationReviewOutlineDecoding Machine LanguageDecoding Example (1/7)Decoding Example (2/7)Decoding Example (3/7)Decoding Example (4/7)Decoding Example (5/7)Decoding Example (6/7)Decoding Example (7/7)Review from before: luiTrue Assembly Language (1/3)Example PseudoinstructionsSlide 16True Assembly Language (2/3)Example PseudoinstructionsSlide 19True Assembly Language (3/3)Questions on PseudoinstructionsRewrite TAL as MALRewrite TAL as MAL (Answer)Peer InstructionPeer Instruction AnswerIn ConclusionCS61C L17 MIPS Instruction Format III (1)Spring 2008 © UCBiPhone games!(and general SDK) Apple is (finally) releasing an iPhone Software Developer Kit on March 6th (?)That means iPhone games that use both touch and accelerometer input!TA Matt Johnsoninst.eecs.berkeley.edu/~cs61c-tminst.eecs.berkeley.edu/~cs61c UC Berkeley CS61C : Machine Structures Lecture 17Instruction Representation III 2008-03-03youtube.com/watch?v=hy0ptZisr70CS61C L17 MIPS Instruction Format III (2)Spring 2008 © UCBReview•MIPS Machine Language Instruction: 32 bits representing a single instruction•Branches use PC-relative addressing, Jumps use absolute addressing.opcode rs rt immediateopcode rs rt rd functshamtRIJtarget addressopcodeCS61C L17 MIPS Instruction Format III (3)Spring 2008 © UCBOutline•Disassembly•Pseudoinstructions•“True” Assembly Language (TAL) vs. “MIPS” Assembly Language (MAL)CS61C L17 MIPS Instruction Format III (4)Spring 2008 © UCBDecoding Machine Language•How do we convert 1s and 0s to assembly language and to C code?Machine language assembly C?•For each 32 bits:1. Look at opcode to distinquish between R-Format, J-Format, and I-Format.2. Use instruction format to determine which fields exist. 3. Write out MIPS assembly code, converting each field to name, register number/name, or decimal/hex number.4. Logically convert this MIPS code into valid C code. Always possible? Unique?CS61C L17 MIPS Instruction Format III (5)Spring 2008 © UCBDecoding Example (1/7)•Here are six machine language instructions in hexadecimal:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex 08100001hex•Let the first instruction be at address 4,194,304ten (0x00400000hex).•Next step: convert hex to binaryCS61C L17 MIPS Instruction Format III (6)Spring 2008 © UCBDecoding Example (2/7)•The six machine language instructions in binary: 0000000000000000000100000010010100000000000001010100000000101010000100010000000000000000000000110000000001000100000100000010000000100000101001011111111111111111 00001000000100000000000000000001•Next step: identify opcode and format1, 4-62rs rt immediate0 rs rt rd functshamtRIJtarget address2 or 3CS61C L17 MIPS Instruction Format III (7)Spring 2008 © UCBDecoding Example (3/7)•Select the opcode (first 6 bits) to determine the format: 0000000000000000000100000010010100000000000001010100000000101010000100010000000000000000000000110000000001000100000100000010000000100000101001011111111111111111 00001000000100000000000000000001•Look at opcode: 0 means R-Format,2 or 3 mean J-Format, otherwise I-Format.•Next step: separation of fieldsRRIRIJFormat:CS61C L17 MIPS Instruction Format III (8)Spring 2008 © UCBDecoding Example (4/7)•Fields separated based on format/opcode:0 0 0 2 3700 0 5 8 4204 8 0 +30 2 4 2 3208 5 5 -12 1,048,577•Next step: translate (“disassemble”) to MIPS assembly instructionsRRIRIJFormat:CS61C L17 MIPS Instruction Format III (9)Spring 2008 © UCBDecoding Example (5/7)•MIPS Assembly (Part 1):Address: Assembly instructions:0x00400000 or $2,$0,$00x00400004 slt $8,$0,$50x00400008 beq $8,$0,30x0040000c add $2,$2,$40x00400010 addi $5,$5,-10x00400014 j 0x100001•Better solution: translate to more meaningful MIPS instructions (fix the branch/jump and add labels, registers)CS61C L17 MIPS Instruction Format III (10)Spring 2008 © UCBDecoding Example (6/7)•MIPS Assembly (Part 2):or $v0,$0,$0 Loop:slt $t0,$0,$a1 beq $t0,$0,Exit add $v0,$v0,$a0addi $a1,$a1,-1 j LoopExit:•Next step: translate to C code (must be creative!)CS61C L17 MIPS Instruction Format III (11)Spring 2008 © UCBDecoding Example (7/7)•After C code (Mapping below)$v0: product $a0: multiplicand $a1: multiplierproduct = 0;while (multiplier > 0) {product += multiplicand; multiplier -= 1;}Before Hex:00001025hex0005402Ahex11000003hex00441020hex20A5FFFFhex 08100001hexDemonstrated Big 61C Idea: Instructions are just numbers, code is treated like data or $v0,$0,$0Loop: slt $t0,$0,$a1 beq $t0,$0,Exit add $v0,$v0,$a0 addi $a1,$a1,-1 j LoopExit:CS61C L17 MIPS Instruction Format III (13)Spring 2008 © UCBReview from before: lui•So how does lui help us?•Example:addi $t0,$t0, 0xABABCDCDbecomes:lui $at, 0xABABori $at, $at, 0xCDCD add $t0,$t0,$at•Now each I-format instruction has only a 16-bit immediate.•Wouldn’t it be nice if the assembler would this for us automatically? If number too big, then just automatically replace addi with lui, ori, addCS61C L17 MIPS Instruction Format III (14)Spring 2008 © UCBTrue Assembly Language (1/3)•Pseudoinstruction: A MIPS instruction that doesn’t turn directly into a machine language instruction, but into other MIPS instructions•What happens with pseudo-instructions?•They’re broken up by the assembler into several “real” MIPS instructions.• Some examples followCS61C L17 MIPS Instruction Format III (15)Spring 2008 © UCBExample Pseudoinstructions•Register Movemove reg2,reg1Expands to:add reg2,$zero,reg1•Load Immediateli reg,valueIf value fits in 16 bits:addi reg,$zero,valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L17 MIPS Instruction Format III (16)Spring 2008 © UCBExample Pseudoinstructions•Load Address: How do we get the address of an instruction or global variable into a register?la reg,labelAgain if value fits in 16 bits:addi reg,$zero,label_valueelse:lui reg,upper 16 bits of valueori reg,$zero,lower 16 bitsCS61C L17 MIPS Instruction Format III (17)Spring 2008 © UCBTrue Assembly Language (2/3)•Problem:•When breaking up a pseudo-instruction, the assembler may need to use an extra register•If it uses any regular register, it’ll overwrite whatever the program has put into it.•Solution:•Reserve a register ($1, called $at for “assembler temporary”) that assembler will use to break up pseudo-instructions.•Since the assembler may use this at any
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