CS 61C L07 MIPS Memory (1)A Carle, Summer 2005 © UCBinst.eecs.berkeley.edu/~cs61c/su05CS61C : Machine StructuresLecture #7: MIPS Memory & Decisions(no, I didn’t draw this…)2005-06-29Andy CarleCS 61C L07 MIPS Memory (2)A Carle, Summer 2005 © UCBReview•In MIPS Assembly Language:• Registers replace C variables• One Instruction (simple operation) per line• Simpler is Better, Smaller is Faster•New Instructions:add, addi, sub•New Registers:C Variables: $s0 - $s7Temporary Variables: $t0 - $t7Zero: $zeroCS 61C L07 MIPS Memory (3)A Carle, Summer 2005 © UCBTopic Outline•Memory Operations•Decisions•More InstructionsCS 61C L07 MIPS Memory (4)A Carle, Summer 2005 © UCBAssembly Operands: Memory•C variables map onto registers; what about large data structures like arrays?•1 of 5 components of a computer: memory contains such data structures•But MIPS arithmetic instructions only operate on registers, never directly on memory.•Data transfer instructionstransfer data between registers and memory:• Memory to register • Register to memoryCS 61C L07 MIPS Memory (5)A Carle, Summer 2005 © UCBAnatomy: 5 components of any ComputerPersonal ComputerProcessorComputerControl(“brain”)DatapathRegistersMemory DevicesInputOutputLoad (from)Load (from)Store (to)Store (to)These are “data transfer” instructions…Registers are in the datapath of the processor; if operands are in memory, we must transfer them to the processor to operate on them, and then transfer back to memory when done.CS 61C L07 MIPS Memory (6)A Carle, Summer 2005 © UCBData Transfer: Memory to Reg (1/5)•To specify a memory address to copy from, specify two things:• A register containing a pointer to memory• A numerical offset (in bytes)•The desired memory address is the sum of these two values.•Example: 8($t0)• specifies the memory address pointed to by the value in $t0, plus 8 bytesCS 61C L07 MIPS Memory (7)A Carle, Summer 2005 © UCBData Transfer: Memory to Reg (2/5)•Load Instruction Syntax:lw <reg1> <offset>(<reg2>)• wherelw: op name to load a word from memoryreg1: register that will receive valueoffset: numerical address offset in bytesreg2: register containing pointer to memoryEquivalent to:reg1 Í Memory [ reg2 + offset ]CS 61C L07 MIPS Memory (8)A Carle, Summer 2005 © UCBData Transfer: Memory to Reg (3/5)Example:lw $t0,12($s0)This instruction will take the pointer in $s0, add 12 bytes to it, and then load the value from the memory pointed to by this calculated sum into register $t0• Notes:•$s0 is called the base register• 12 is called the offset• offset is generally used in accessing elements of array or structure: base reg points to beginning of array or structureData flowCS 61C L07 MIPS Memory (9)A Carle, Summer 2005 © UCBData Transfer: Reg to Memory (4/5)• Also want to store from register into memory• Store instruction syntax is identical to Load’s• MIPS Instruction Name:sw (meaning Store Word, so 32 bits or one word are loaded at a time)• Example:sw $t0,12($s0)This instruction will take the pointer in $s0, add 12 bytes to it, and then store the value from register $t0 into that memory address• Remember: “Store INTO memory”Data flowCS 61C L07 MIPS Memory (10)A Carle, Summer 2005 © UCBData Transfer: Pointers v. Values (5/5)•Key Concept: A register can hold any 32-bit value. That value can be a (signed) int, an unsigned int, a pointer (memory address), and so on•If you write lw $t2,0($t0)then $t0 better contain a pointer•Don’t mix these up!CS 61C L07 MIPS Memory (11)A Carle, Summer 2005 © UCBAddressing: What’s a Word? (1/5)•A word is the basic unit of the computer.• Usually sizeof(word) == sizeof(registers)• Can be 32 bits, 64 bits, 8 bits, etc.• Not necessarily the smallest unit in the machine!CS 61C L07 MIPS Memory (12)A Carle, Summer 2005 © UCBAddressing: Byte vs. word (2/5)•Every word in memory has an address, similar to an index in an array•Early computers numbered words like C numbers elements of an array:•Memory[0], Memory[1], Memory[2], …Called the “address” of a word•Computers needed to access 8-bit bytesas well as words (4 bytes/word)•Today machines address memory as bytes, (i.e.,“Byte Addressed”) hence 32-bit (4 byte) word addresses differ by 4•Memory[0], Memory[4], Memory[8], …CS 61C L07 MIPS Memory (13)A Carle, Summer 2005 © UCBAddressing: The Offset Field (3/5)•What offset in lw to select A[8] in C?• 4x8=32 to select A[8]: byte v. word •Compile by hand using registers:g = h + A[8];• g: $s1, h: $s2, $s3:base address of A•1st transfer from memory to register:lw $t0,32($s3) # $t0 gets A[8]• Add 32 to $s3 to select A[8], put into $t0•Next add it to h and place in gadd $s1,$s2,$t0 # $s1 = h+A[8]CS 61C L07 MIPS Memory (14)A Carle, Summer 2005 © UCBAddressing: Pitfalls (4/5)•Pitfall: Forgetting that sequential word addresses in machines with byte addressing do not differ by 1. • Many an assembly language programmer has toiled over errors made by assuming that the address of the next word can be found by incrementing the address in a register by 1 instead of by the word size in bytes. • So remember that for both lw and sw, the sum of the base address and the offset must be a multiple of 4 (to be word aligned)CS 61C L07 MIPS Memory (15)A Carle, Summer 2005 © UCBAddressing: Memory Alignment (5/5)0 1 2 3AlignedNotAligned•MIPS requires that all words start at byte addresses that are multiples of 4 bytes•Called Alignment: objects must fall on address that is multiple of their size.0, 4, 8, or ChexLast hex digit of address is:1, 5, 9, or Dhex2, 6, A, or Ehex3, 7, B, or FhexCS 61C L07 MIPS Memory (16)A Carle, Summer 2005 © UCBRole of Registers vs. Memory•What if more variables than registers?• Compiler tries to keep most frequently used variable in registers• Less common in memory: spilling•Why not keep all variables in memory?• registers are faster than memory•Why not have arithmetic insts to operate on memory addresses?• E.g. “addmem 0($s1) 0($s2) 0($s3)”• Some ISAs do things like this (x86) • MIPS – Keep the common case fast.CS 61C L07 MIPS Memory (17)A Carle, Summer 2005 © UCBPeer Instruction Round 1We want to translate *x = *y into MIPS(x, y are pointers stored in: $s0 $s1)CS 61C L07 MIPS Memory (18)A Carle, Summer 2005 © UCBTopic Outline•Memory Operations•Decisions•More InstructionsCS 61C L07 MIPS Memory (19)A
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