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Berkeley ELENG 105 - Lecture 18

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Lecture 18Basic MOSFET AmplifierMOSFET BiasingSelf-Biased MOSFET StageMOSFETs as Current SourcesCommon-Source Stage:  = 0Common-Source Stage:   0CS Gain Variation with LCS Stage with Current-Source LoadPMOS CS Stage with NMOS LoadCS Stage with Diode-Connected LoadCS Stage with Diode-Connected PMOS LoadCS Stage with DegenerationExampleRout of CS Stage with DegenerationOutput Impedance ExamplesCS Stage with Gate ResistanceCS Core with BiasingEE105 Fall 2007 Lecture 18, Slide 1 Prof. Liu, UC BerkeleyLecture 18OUTLINE•Basic MOSFET amplifier•MOSFET biasing•MOSFET current sources•Common-source amplifierReading: Chapter 7.1-7.2ANNOUNCEMENTS•HW#10 will be posted tonightEE105 Fall 2007 Lecture 18, Slide 2 Prof. Liu, UC Berkeley•For large small-signal gain, the MOSFET should be operated in the saturation region. Vout should not fall below Vin by more than VTH. Basic MOSFET AmplifierEE105 Fall 2007 Lecture 18, Slide 3 Prof. Liu, UC BerkeleyMOSFET BiasingThe voltage at node X is determined by VDD, R1, and R2:Also, SoxnTHDDTHGSRLWCVVRRVRVVVVV1 where212121211DDXVRRRV212SDGSXRIVV  221THGSoxnDVVLWCI EE105 Fall 2007 Lecture 18, Slide 4 Prof. Liu, UC BerkeleySelf-Biased MOSFET Stage•Note that there is no voltage dropped across RG M1 is operating in the saturation region.DDDSGSDDVIRVRI EE105 Fall 2007 Lecture 18, Slide 5 Prof. Liu, UC BerkeleyMOSFETs as Current Sources•A MOSFET behaves as a current source when it is operating in the saturation region.•An NMOSFET draws current from a point to ground (“sinks current”), whereas a PMOSFET draws current from VDD to a point (“sources current”).EE105 Fall 2007 Lecture 18, Slide 6 Prof. Liu, UC BerkeleyCommon-Source Stage:  = 0DoutinDDoxnDmvRRRRILWCRgA2Amplifier circuit Small-signal analysis circuitfor determining voltage gain, AvSmall-signal analysis circuit fordetermining output resistance, RoutEE105 Fall 2007 Lecture 18, Slide 7 Prof. Liu, UC BerkeleyCommon-Source Stage:   0•Channel-length modulation results in reduced small-signal voltage gain and amplifier output resistance. ODoutinODmvrRRRrRgA||||Small-signal analysis circuitfor determining voltage gain, AvSmall-signal analysis circuit fordetermining output resistance, RoutEE105 Fall 2007 Lecture 18, Slide 8 Prof. Liu, UC BerkeleyCS Gain Variation with L•An ideal current source has infinite small-signal resistance.The largest Av is achieved with a current source as the load. •Since  is inversely proportional to L, Av increases with L. DoxnDDoxnomvIWLCIILWCrgA22EE105 Fall 2007 Lecture 18, Slide 9 Prof. Liu, UC BerkeleyCS Stage with Current-Source Load 21211||||OOoutOOmvrrRrrgA•Recall that a PMOSFET can be used as a current source from VDD.Use a PMOSFET as a load of an NMOSFET CS amplifier.EE105 Fall 2007 Lecture 18, Slide 10 Prof. Liu, UC BerkeleyPMOS CS Stage with NMOS Load •An NMOSFET can be used as the load for a PMOSFET CS amplifier. 21212||)||(OOoutOOmvrrRrrgAEE105 Fall 2007 Lecture 18, Slide 11 Prof. Liu, UC BerkeleyCS Stage with Diode-Connected LoadAv is lower, but it is less dependent on process parameters (n and Cox and drain current (ID).Amplifier circuit Small-signal analysis circuitincluding MOSFET output resistances  2121//1:0 IfLWLWggAmmv1221221||||1||||1OOmoutOOmmvrrgRrrggA:0EE105 Fall 2007 Lecture 18, Slide 12 Prof. Liu, UC BerkeleyCS Stage with Diode-Connected PMOS Load2112112||||1||||1oomoutoommvrrgRrrggA:0EE105 Fall 2007 Lecture 18, Slide 13 Prof. Liu, UC BerkeleyCS Stage with DegenerationSmDvRgRA1 :0 IfAmplifier circuit Small-signal analysis circuitfor determining voltage gain, AvEE105 Fall 2007 Lecture 18, Slide 14 Prof. Liu, UC BerkeleyExample•A diode-connected device degenerates a CS stage.2111mmDvggRAEE105 Fall 2007 Lecture 18, Slide 15 Prof. Liu, UC BerkeleyRout of CS Stage with Degeneration•Degeneration boosts the output impedance:Small-signal analysis circuit fordetermining output resistance, Rout  SOmOSSmOXXXSXSXmXORrgrRRgrivvRiRigir1SXRiv 1Current flowing down through ro is SXmXSXmXmXRigiRigivgi 1EE105 Fall 2007 Lecture 18, Slide 16 Prof. Liu, UC BerkeleyOutput Impedance Examples21111mmOoutggrR1211 OOOmoutrrrgR EE105 Fall 2007 Lecture 18, Slide 17 Prof. Liu, UC BerkeleyCS Stage with Gate Resistance•For low signal frequencies, the gate conducts no current. Gate resistance does not affect the gain or I/O impedances.EE105 Fall 2007 Lecture 18, Slide 18 Prof. Liu, UC BerkeleyCS Core with


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Berkeley ELENG 105 - Lecture 18

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