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Berkeley ELENG 105 - MOS Transistor models: Linear models, SPICE models

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1Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16Lecture 16: MOS Transistor models:Linear models, SPICE modelsProf. J. S. SmithDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithContextIn the last lecture, we discussed the MOS transistor, and– added a correction due to the changing depletion region, called the body effect– Did a review of small signal models– Started small signal models for the FETz In this lecture, we will – Continue to build the small signal models for MOS FETs– look at how MOS Transistors are modeled in SPICE2Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithReadingz We are next going to look at the analog characteristics of simple digital devices, 5.2→5.4z And following the midterm, we will cover PN diodes again in forward bias, and develop small signal models: Chapter 6 z we will then take a week on bipolar junction transistor (BJT): Chapter 7z Then go on to design of transistor amplifiers: chapter 8Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithTransistor equations:Cutoff0=⇒><DTPGSTNGSIVVVVLinear()[]221,,DSDSTGSoxDTPGSDSTPGSTNGSDSTNGSVVVVLWCIVVVVVVVVVV−−=⇒−>≤−<≥µSaturation()()DSTGSoxDTPGSDSTPGSTNGSDSTNGSVVVLWCIVVVVVVVVVVλµ+−=⇒−≤≤−≥≥1,,221Note: if VSB≠ 0, need to calculate VTWe discussed a physical model for these parameters, but often they will be used tofit the observed curves for a given manufacturing process3Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithCircuit modelsz We are now going to produce circuit models, which will translate the mathematics into drawings of circuit elements so that we can design real circuits using our developed intuition.Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithCircuit models:z In order to translate mathmatical expressions into an equivalent circuit, we will use resistors, capacitors, and variable current sources, hooking them up with perfect wires. Perfect wires have noparasitic capacitance or inductance, and convert into equations by Kirchoff’s laws:−+1v12gvi =CR→)(ti−+)(tv4Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithLarge signal models:z Large signal models try to recreate the behavior of real devices over large voltage swings, may not be linear, and may not be terribly accurate in the details. For example, a PN junction might be modeled as a perfect diode, which always blocks current in the forward direction, and passes current with no voltage drop in the reverse directionDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithDC Large signal model for a FET−+GSV↓DISometimes a circuit model is very close to mathematics, for exampleWe can directly convert our mathematical model for the FET into:−+SBVSDV+−()()⎟⎠⎞⎜⎝⎛−−+−+=−==⎪⎩⎪⎨⎧>⇐+⎟⎟⎠⎞⎜⎜⎝⎛−′≤⇐=fSBfTTTGSGTDSGTGTDSGTGTDVVVVVVVVVVVVVVVLWkVIφφγλ22 and ,,min0 120 00satmin2minminWhere:5Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithTypical parametersz Here are some parameters for an actual 0.25 micron process:-0.1-1-0.4-0.4PMOS0.060.630.40.43NMOS(volts-1)(A/V2)(volts)(Root volts)(Volts)0TVγDSATVk′λ610115−×61030−×−Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithLimitations of large signal modelsz Large signal models must often be greatly simplified to handle intuitivelyz Large signal models are often nonlinear, so it is difficult to analyze circuits with more than a few elements directlyz Elements such as variable stored charge are difficult to model, often use a fixed capacitance which has a compromise value6Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithSimplified large signal modelz To think about, and design circuits, we will often use rough models which behave somewhat like the physical device under a particular circumstance. For example we might model a FET as a resistive switch: CR−+GSV−+DSVGDSWhere C and R are chosenpurely to give us an approximationto the observed value under theoperating conditionsDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithSmall signal modelsz If we linearize the model as discussed in the last lecture, by picking an operating point and allowing only small signal variations around those operating points (for both voltages and currents) we can produce a small signal model, one which includes only linear elements.z This will let use linear circuit theory, which is a way we can handle very large numbers of interacting components.7Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithSmall signal model for the MOS FET()DSDSdsit I i=+DS DSds gs dsgs dsiiivvvv∂∂=+∂∂1ds m gs dsoigv vr=+TransconductanceConductanceThe current from the drain of our FET can be modeled for small signals:For a given operating point voltage for Vgsand Vds, we get:Which we will then label:Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithSubstrate potentialLet’s look at the back gate effect in a small signal modelEffect: changes threshold voltage, which changes the drain current … substrate acts like a “backgate”ℵℵ∂∂=∆∆=BSDBSDmbvivig(VGS, VDS, VBS) ← are all held constant⇒ℵ8Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithBackgate TransconductanceResult:22Tn mDDmbBS Tn BSBSpQQQVgiigvVvVγφ∂∂∂== =∂∂∂−−()022TT SB p pVV Vγφφ=+ − −−Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 16 Prof. J. S. SmithTransconductancez Notice that we have terms in our equations which give the small signal current into one terminal in as a constant times the small signal voltage into another terminal. In order to translate that into a linear equivalent circuit, we will use a variable current source, but where the current is just proportional to a voltage:Where g is called


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Berkeley ELENG 105 - MOS Transistor models: Linear models, SPICE models

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