Berkeley ELENG 105 - Designing amplifiers, biasing, frequency response (10 pages)

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Designing amplifiers, biasing, frequency response



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Designing amplifiers, biasing, frequency response

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Lecture Notes


Pages:
10
School:
University of California, Berkeley
Course:
Eleng 105 - Microelectronic Devices and Circuits
Microelectronic Devices and Circuits Documents

Unformatted text preview:

EECS 105 Spring 2004 Lecture 34 EECS 105 Spring 2004 Lecture 34 Prof J S Smith Reading Lecture 34 Designing amplifiers biasing frequency response Prof J S Smith Department of EECS z Chapter 9 multi stage amplifiers The frequency analysis is in the first section of chapter 10 but we won t go farther into chapter 10 for a while z The Lectures on Wednesday and Friday will be given by Joe and Jason respectively They will be doing several example problems University of California Berkeley Department of EECS University of California Berkeley Prof J S Smith EECS 105 Spring 2004 Lecture 34 Prof J S Smith EECS 105 Spring 2004 Lecture 34 Context Lecture Outline We will figure out more of the design parameters for the amplifier we looked at in the last lecture and then we will do a review of the approximate frequency analysis of circuits which have a single dominant pole Department of EECS University of California Berkeley z z z Department of EECS Example 1 Cascode Amp Design Example 2 CS NMOS CS PMOS Review of frequency analysis with a dominant pole University of California Berkeley 1 EECS 105 Spring 2004 Lecture 34 Prof J S Smith EECS 105 Spring 2004 Lecture 34 Prof J S Smith Current Supply Design Amplifier Schematic High impedance current source means all of the small signal current goes to the load resistance giving more SS voltage gain Note that the backgate connection for M2 is not specified ignore gmb Output resistance goal requires large roc for high gain so we used a cascode current source Department of EECS University of California Berkeley Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 34 Prof J S Smith EECS 105 Spring 2004 Lecture 34 Prof J S Smith Complete Amplifier Schematic Bias voltages derived from transistors under similar operating conditions to the transistors they supply Goals gm1 1 mS Rout 10 M Cascode current source For high roc Totem Pole Voltage Supply DC voltages must be set for the cascode current supply transistors



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