Announcements Homework 12 due today EE105 Fall 2005 Lab 9 reports due Thursday 3 30pm in the drop box Microelectronic Devices and Circuits Reading Chapter 8 8 2 8 6 8 7 8 8 1 8 9 1 Lecture 28 BJT Amplifiers 2 Lecture Material Bipolar Amplifiers Common emitter amplifier Last lecture Bipolar junction transistor Small signal models Biasing adjust VBIAS VBE so that IC ISUP Note this could be tricky This lecture BJT amplifiers common emitter common collector common base 3 4 Common Base Amplifier Small Signal Two Port Model To find IBIAS note that IBIAS IE 1 F IC Common base current gain Ai F Parameters Rin Rout Gm 5 6 1 CB Input Resistance CB Output Resistance put roc back in after finding vt it note polarity Rin Same topology as CG amplifier but with r RS rather than RS Rout 7 8 Common Collector Amplifier Common Base Two Port Model Why is it a current amp DC Bias output is one VBE drop down from input 9 10 Common Collector Output Resistance Common Collector Input Resistance note that o gmr Divider between vt and v Rin 11 12 2 Common Collector Voltage Gain Common Collector Two Port Model KCL at the output node note v vt vout 13 14 Summary of Two Port Parameters for CE CS CB CG CC CD Common Collector Summary Typo in Fig 8 47 in text Rin can t depend upon RS Input and output resistances depend on load and source resistances respectively See Appendix to Chapter 8 for limits to using this model with very low values of RL 15 Common Emitter with Emitter Degeneration 16 DC Bias for CEdeg 1 What is it 2 DC Bias 3 Small signal 2 port model 4 Output swing 17 18 3 Two Port Model for CEdeg Two Port Model for CEdeg cont Input looks like CC Rin Output looks like CB see p 504 for details Rout Transconductance Gm Find Gm Voltage Gain Is it a good voltage amplifier vs CE 19 20 4
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