EECS 105 Spring 2004 Lecture 15 Lecture 15 MOS Transistor models Body effects SPICE models Prof J S Smith Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Context In the last lecture we discussed the modes of operation of a MOS FET Voltage controlled resistor model I V curve Square Law Model Saturation model In this lecture we will Department of EECS add a correction due to the changing depletion region called the body effect Produce small signal models for the FET and look at how MOS Transistors are modeled in SPICE University of California Berkeley 1 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Reading z z z z z Today and Friday we will finish the material from chapter 4 Then we look at the analog characteristics of simple digital devices 5 2 5 4 And following the midterm we will cover PN diodes again in forward bias and develop small signal models Chapter 6 we will then take a week on bipolar junction transistor BJT Chapter 7 Then go on to design of transistor amplifiers chapter 8 Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith MOS operation z z z An inversion mode MOS transistor operates by producing a sheet carriers just under the oxide The names source and drain are picked so that the inversion charge is larger at the source end Approximate inversion charge QN y drain is higher than the source less charge at drain end of channel Department of EECS University of California Berkeley 2 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Gradual channel approximation z z z We have played pretty fast and loose using the average charge and average velocity etc A more accurate model of the physics includes the fact that the charge density under the gate and the velocity vary along the channel length The current at each point along the length of the device must be independent of position in steady state no buildup of charge I D Wv y y QN y z Where ID is the drain current y is the distance in the direction from the source to the drain vy is the component of velocity in the source drain direction and QN y is the charge density of the electrons under the gate Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Gradual channel approximation 2 z z z z For most FET s the distances in y the Source Drain direction are significantly larger than the distances in the x direction perpendicular to the oxide If this assumption is not true its called a short channel device This means that the fields in the x direction are much stronger than the fields in the y direction This is in the text section 4 3 with the main difference from the simple approximation being the back gate effect due to the variation in the depletion width to the body substrate Department of EECS University of California Berkeley 3 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Effect of substrate voltage z What is the effect of different substrate voltages Depletion width W changes Need to account for different depletion region charge VSB 0 QB 0 2qN A S 2 P VSB 0 QB 2qN A S 2 P VSB Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Threshold voltage general z General form with substrate bias VT VFB 2 P z QB 0 Qox Cox Cox Substituting the capacitance as a function of voltage VT VT 0 Where Department of EECS 2qN A S Cox 2 P VSB 2 P for NMOS for PMOS University of California Berkeley 4 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Threshold voltage summary z If VSB 0 no substrate bias VT 0 VFB 2 F z QB Qox Cox Cox If VSB 0 non zero substrate bias VT VT 0 2 P VSB 2 P z Body effect substrate bias coefficient 2qN A S Cox NMOS z Threshold voltage increases as VSB increases The threshold voltage will also vary along the gate This is called the body effect or back gate effect Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Threshold Voltage NMOS vs PMOS NMOS PMOS p substrate n substrate Substrate Fermi potential p 0 n 0 Depletion charge density QB 0 QB 0 Substrate bias coefficient 0 0 Substrate bias voltage VSB 0 VSB 0 Threshold voltage VT0 0 VT0 0 enhancement devices Department of EECS University of California Berkeley 5 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Body effect Voltage VSB changes the threshold voltage of transistor z For NMOS Body normally connected to ground for PMOS body normally connected to Vcc Raising source voltage increases VT of transistor G B S p n G D n L xj B S n p D L p xj N well PMOS NMOS p type substrate Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Threshold voltage adjustment z z Threshold voltage can be changed by doping the channel region with donor or acceptor ions For NMOS z For PMOS z The threshold voltage is increased by adding acceptor ions The threshold voltage is decreased by adding donor ions The threshold voltage is increased by adding donor ions The threshold voltage is decreased by adding acceptor ions Approximate change in threshold voltage Density of implanted ions NI cm 2 VT 0 Department of EECS qN I Cox University of California Berkeley 6 EECS 105 Spring 2004 Lecture 15 Prof J S Smith Channel Length Modulation z z As VDS is increased the pinch off point moves closer to source shortening the channel length The drain current increases due to shorter channel L L L I D 12 nCox W VGS VTN 2 1 VDS L channel length modulation coefficient Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith Review Cutoff VGS VTN ID 0 VGS VTP Linear VGS VTN VDS VGS VTN W VGS VT VDS 12 VDS2 I D Cox VGS VTP VDS VGS VTP L Saturation VGS VTN VDS VGS VTN W 2 I D 12 Cox VGS VT 1 VDS VGS VTP VDS VGS VTP L Note if VSB 0 need to calculate VT Department of EECS University of California Berkeley 7 EECS 105 Spring 2004 Lecture 15 Prof J S Smith NMOS z i VDS VGS VT Slope due to Channel length modulation VGS Steps Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 15 Prof J S Smith PMOS Slope due to Channel length modulation VDS VGS VT Department of EECS University of California Berkeley 8 EECS 105 Spring 2004 Lecture 15 z z z z Prof J S Smith We now have reasonable mathematical models for NMOS and PMOS field effect transistors We will now …
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