Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22Lecture 22:Multistage AmpsProf. NiknejadDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadLecture OutlineFinish Current MirrorsAn Example Using CascodesMultistage Amps Cascode Amplifier: Magic!Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadThe Integrated “Current Mirror”M1and M2have the same VGSIf we neglect CLM (λ=0), then the drain currents are equalSince λ is small, the currents will nearly mirror one another even if Voutis not equal to VGS1We say that the current IREFis mirrored into iOUTNotice that the mirror works for small and large signals!High ResLow ResisDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCurrent Mirror as Current SourceThe output current of M2is only weakly dependent on vOUTdue to high output resistance of FETM2 acts like a current source to the rest of the circuitDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadSmall-Signal Resistance of I-SourceDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadImproved Current SourcesGoal: increase rocApproach: look at amplifier output resistance results … to see topologies that boost resistanceLooks like the output impedance of a common-source amplifier with source degenerationout oRr>>Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadEffect of Source DegenerationEquivalent resistance loading gate is dominated by the diode resistance … assume this is a small impedanceOutput impedance is boosted by factor()SttmgsoRvigvrv=− +1eqmRg≈Sgs Rvv≈−SRtSviR=()ttmStotSvigRiriR=+ +()1tomS otvRgRri=≈+()1mSgR+Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCascode (or Stacked) Current SourceInsight: VGS2= constant ANDVDS2= constantSmall-Signal Resistance roc:()1omS oRgRr≈+()1omo oRgrr≈+20om oRgr r≈>>Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadDrawback of Cascode I-SourceMinimum output voltage to keep both transistors in saturation:,4,2,OUT MIN DS MIN DS MINVVV=+ vOUT iOUT 2,202DS MIN GS T DSATVVVV>−=424 240DDSATGSGSGSTVV V V V V>+=+−,240OUT MIN GS GS TVVVV=+−Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCurrent Sinks and SourcesSink: output current goesto groundSource: output current comesfrom voltage supplyDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCurrent MirrorsIdea: we only need one reference current to set up all the current sources and sinks needed for a multistage amplifier.Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadMultistage AmplifiersNecessary to meet typical specifications for any of the 4 typesWe have 2 flavors (NMOS, PMOS) of CS, CG, and CD and the npn versions of CE, CB, and CC (for a BiCMOS process)What are the constraints?1. Input/output resistance matching2. DC coupling (no passive elements to block the signal)Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadSummary of Cascaded AmplifiersGeneral goals:1. Boost the gain parameter (except for buffers)2. Optimize the input and output resistancesRoutRinTransresistance:Transconductance:Current:Voltage:∞∞∞00∞00Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadStart: Two-Stage Voltage Amplifier• Use two-port models to explore whether the combination “works”CE1CE2Results of new 2-port: Rin= Rin1,Rout= Rout2()()121 22||v m in out m outAGRR GR=− × −()()122 1 2||vm m in out outAGGR R R=CE1,2Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadAdd a Third Stage: CCGoal: reduce the output resistance(important spec. for a voltage amp)CE1CE2CC3Output resistance: 2233||11SoocoutmmRrrRggββ=+=+Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadUsing CMOS StagesCS1CS2CD3Output resistance: Voltage gain (2-port parameter): Input resistance: ∞()( )111 2 2 2|| ||vmoocmoocAgrrgrr=− × −1outmmbRgg=+Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadMultistage Current Buffers CB1CB2Are two cascaded common-base stages better than one?Input resistance: Rin= Rin1Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadTwo-Port Models()2222022||||1ocSmoutoutrRrgrRRπ+≅=Output impedance of stage #1 (large)() ()0222 2 2 2||||out m oc o o ocRrgrr rrπβ≅=Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCommon-Gate 2ndStage()222022||1ocSmoutoutrRgrRR +≅=()202 2 1 1 21|| ||out out m o oc ocRR r grrr=≅+Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadSecond Design Issue: DC CouplingConstraint: large inductors and capacitors are not available Output of one stage is directly connected to the input of the next stage must consider DC levels … why? 3.2VDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadAlternative CG-CC CascadeUse a PMOS CD Stage: DC level shifts upward3.2VDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCG Cascade: DC BiasingTwo stages can have different supply currentsExtreme case:IBIAS2= 0 ADepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCG Cascade: Sharing a SupplyFirst stage has no currentsupply of its own its outputresistance is modifiedDepartment of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadThe Cascode ConfigurationDC bias: Two-port model: first stage has no current supply of its ownCommon source / common gatecascade is one version of a cascode(all have shared supplies)Department of EECS University of California, BerkeleyEECS 105 Fall 2003, Lecture 22 Prof. A. NiknejadCascode Two-Port Model CS1* CG2
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