EE105 Fall 2006 Microelectronic Devices and Circuits Prof Jan M Rabaey jan eecs Lecture 19 Multistage Cascode Why multi stage Improve gain Improve input output resistance to match environment 2 1 3 Two Stage Voltage Amplifier Use two port models to explore whether the combination works CS1 Rin Rin1 CS2 Rout Rout2 RL ro Results Rin Rin1 Rout Rout2 Av Av1 Av2 4 2 Voltage Amplifier Should have low output resistance to effectively drive RL Add Common Drain Source Follower Stage CS1 CS2 CD3 Input resistance Voltage gain 2 port parameter gm r0 2 x 1 Output resistance 1 gm 5 Transconductance Amplifier Should have high input and output resitance and high Gm CS1 Input resistance CS2 CG3 Add common gate stage Transconductance A1gm2 Output resistance ro roc 6 3 Adding Common Gate Stage Input resistance Voltage gain 2 port parameter A1gm2 rout2 rout2 1 gm3 Output resistance roc gmroRs with Rs rout2 7 Summary of Cascaded Amplifiers General goals 1 Boost the gain parameter except for buffers 2 Optimize the input and output resistances Voltage Current Transconductance Transresistance Rin Hi Lo Hi Lo Rout Lo Hi Hi Lo 8 4 Second Design Issue DC Coupling Constraint large inductors and capacitors are not available Output of one stage is directly connected to the input of the next stage must consider DC levels why 9 Alternate CS CS Cascade Use a PMOS CS Stage 10 5 Multistage Current Buffers Are two cascaded common gate stages better than one CG2 CG1 Input resistance Rin Rin1 Voltage gain Av1 Rin 2 1 gm g m r0 g m r0 Av 2 g m r0 Rin 2 Rout1 1 g m r0 11 CG Cascade DC Biasing Two stages can have different supply currents Extreme case IBIAS2 0 A 12 6 CG Cascade Sharing a Supply First stage has no current supply of its own its output resistance is modified 13 The Cascode Configuration Common source common gate cascade is one version of a cascode all have shared supplies DC bias Two port model first stage has no current supply of its own 14 7 Cascode Two Port Model CS1 CG2 Output resistance of first stage Rout CS ro1 Rout roc 2 1 g m ro1 ro 2 Gm g m1 R in Why is the cascode such an important configuration 15 Miller Capacitance of Input Stage Find the Miller capacitance for Cgd1 Input resistance to common gate second stage is low gain across Cgd1 is small 16 8 Two Port Model with Capacitors CM 1 AvCgd 1 Cgd 1 Miller capacitance AvCgd 1 g m1 g 1 ro1 m1 1 gm2 gm2 CM 2C gd 1 17 Other contributions 18 9 Improved Current Sources Goal increase roc Approach look at amplifier output resistance results to see topologies that boost resistance 19 Cascode or Stacked Current Source Insight VGS2 constant AND VDS2 constant Small Signal Resistance roc 20 10 Drawback of Cascode I Source Minimum output voltage for all transistors saturated VOUT MIN VDS 4 SAT VS 4 VDS 4 SAT VGS 2 iOUT vOUT 21 Complete Amplifier Schematic 22 11 Complete Amplifier Schematic Goals gm1 1 mS Rout 10 M 23 Device Sizes M1 select W L 1 200 2 to meet specified gm1 1 mS find VBIAS 1 2 V Cascode current supply devices select VSG 1 5 V W L 4 W L 4B W L 3 W L 3B 64 2 M2 select W L 2 50 2 to meet specified Rout 10 M find VGS2 1 4 V Match M2 with diode connected device M2B Assuming perfect matching and zero input voltage what is VOUT 24 12 Output Voltage Swing Maximum VOUT Minimum VOUT 25 Two Port Model Find output resistance Rout n 1 20 V 1 p 1 50 V 1 at L 2 m ron 100 A 20 V 1 1 200 k rop 500 k gm2 2ID 2 2 100 A 500 S VGS 2 VTn 1 4V 1V gm3 2 ID 3 2 100 A 400 S VSG 3 VTp 1 5V 1V Rout roc ro 2 1 g m 2RS 2 ro 3 1 g m 3RS 3 ro 2 1 g m 2ro1 26 13
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