EE 105 Spring 2005 Discussion Notes written by Amin Monday April 18 2005 EE 105 Discussion Section 101 Announcements High Voltage Gain Amplifier Design Suppose that it is desired to design an amplifier with large voltage gain using a single stage Based upon our knowledge of single stage amplifiers one potential candidate is the common source amplifier Let s examine the maximum attainable voltage gain from such a stage Basic common source amplifier Figure 1 shows the circuit diagram of a PMOS common source stage The voltage gain of such a stage can be shown to equal the following VDD vout g m1 ro1 vin 1 vin In order to obtain a feel for how high the expression in 1 can be in value let s use appropriate equations for g m1 and ro1 More specifically substituting ro1 g m1 2 I SD1 V DSAT 1 M1 vout and 1 in 1 yields the following 1 I SD1 2 I SD1 vout 1 2 vin V DSAT 1 1 I SD1 V DSAT 1 1 2 Figure 1 PMOS CS with ideal current source Substituting typical values for VDSAT 1 200mV and 1 0 05V 1 into 2 yields a voltage gain of 200 in magnitude In order to increase the voltage gain of a common source stage one has two options from 2 1 Reduce V DSAT 1 and or 2 Reduce 1 Unfortunately one can not reduce V DSAT 1 endlessly because the MOSFET transistor enters the subthreshold region of operation see EE 130 for VDSAT values below approximately 150mV This is why 100 150mV is often set as the lower bound for V DSAT in when it comes to amplifier design in EE105 140 240 Hence to increase the voltage 1 EE 105 Spring 2005 Discussion Notes written by Amin gain of a common source stage beyond 200 in magnitude one can only reduce in practice In order to reduce of a transistor one needs to increase the length In order to not upset the corresponding VDSAT of the resulting transistor one needs to increase the width by the same proportion As an example to increase the voltage gain of a common source stage from 200 to 40E3 one would need to increase the length and correspondingly width by a factor of 200 Increasing the size of a transistor has two disadvantages i eats up silicon area ii degrades the frequency response because the intrinsic capacitances associated with the MOSFET are larger The latter is of much more concern Hence a different topology needs to be employed if voltage gain larger than 200 in magnitude is desired Note In practice one does not have access to ideal current sources As a result the ideal current source depicted in Figure 1 would be implemented using a current mirror in practice Subsequent to this the voltage gain expression in 1 would need to be modified The result is the following vout 3 g m1 ro1 ro 3 vin where ro 3 is the resistance looking down into the current mirror based current source Cascode amplifier In order to arrive at a topology that yields large voltage gain one needs to step back and recall the big picture of how voltage gain is set As mentioned on previous occasions the voltage gain of an unloaded amplifier is given by the following expression Av unloaded voltage gain Gm Rout 4 From 4 one has two options to increase the voltage gain of an amplifier 1 Increase Gm and or 2 Increase Rout Here we will focus on the latter option i e increasing the output resistance The resulting amplifier is referred to as a cascode amplifier a schematic of which is shown in Figure 2 Let s next examine the voltage gain of such a structure by evaluating in turn its Gm and Rout Gm of a cascode amplifier Figure 3 shows the circuit from which Gm for the cascode amplifier shall be computed Note that a test voltage i e vt has been applied to the gate and the output has been shorted to ground in accordance with the rules for calculating Gm Gm can be calculated 2 EE 105 Spring 2005 Discussion Notes written by Amin VDD g m1 v sg1 vin VBIAS ro1 g m1 vt M1 Rright Rdown M2 M2 vout iout Figure 2 PMOS cascode with ideal current source Figure 3 Calculating Gm M1 M2 Rup Rout Figure 4 Calculating Rout as follows 1 vt causes a current to be generated in M1 through the g m1 voltage dependent current source More specifically the current generated has a value of g m1 vt This current enters node from the left and divides between the right and down branches One can use the current divider formula to see how the current g m1 vt divides between the aforementioned branches 2 Using the current divider formula one obtains the following expression for the current flowing through the downward branch from node 3 EE 105 Spring 2005 Discussion Notes written by Amin idown g m1 vt Rright 5 Rright Rdown But using the resistance formulas Rright ro1 and Rdown 1 g m2 6 ro 2 ro 2 1 g mb 2 ro 2 g m 2 g mb 2 ro 2 g m 2 g mb 2 Substituting the expressions in 6 into 5 yields ro1 idown g m1 vt 1 ro1 g m 2 g mb 2 7 Assuming that g m ro 1 7 can be simplified as follows idown g m1 vt ro1 ro1 g m2 1 g mb 2 g m1 vt ro1 g m1 vt ro1 8 3 From Figure 3 iout idown Thus using 8 iout g m1 vt 9 But Gm iout by definition Hence 9 yields the following vt Gm g m1 10 Note The Gm of a cascode is approximately equal to the Gm of a basic commonsource stage Rout of a cascode amplifier Figure 4 shows the circuit from which Rout for the cascode amplifier shall be computed Assuming that the current source is ideal Rout Rup Using the resistance formulas from Discussion 8 rout rup ro1 ro 2 g m 2 g mb 2 ro1 ro 2 11 Again assuming that g m ro 1 11 can be simplified as follows 12 Rout Rup g m 2 g mb 2 ro1 ro 2 4 EE 105 Spring 2005 Discussion Notes written by Amin Note The Rout of a cascode is greater than the Rout of a basic common source stage by approximately a factor of g m 2 g mb 2 ro 2 Voltage gain of a cascode amplifier Using 10 and 12 in 4 yields the following vout g m1 g m 2 g mb 2 ro1 ro 2 vin 13 In order to obtain a feel for how high the expression in 13 can be in value let s use appropriate equations for g m1 g m 2 ro1 and ro 2 we will ignore g mb 2 for now Doing so yields vout 2 I SD1 2 I SD 2 1 1 4 vin VDSAT 1 VDSAT 2 1 I SD1 2 I SD 2 …
View Full Document
Unlocking...