UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE105 Lab Experiments Prelab 9 MOS Characterization and Amplifiers Name Lab Section VCC vin VIN RS vout Figure 1 Common drain amplifier 1 Draw the small signal model for the common drain amplifier shown in Figure 1 2 Derive the output impedance 3 Derive the voltage gain 1 2 VCC RD vout VB vin Figure 2 Common gate amplifier 4 Draw the small signal model for the common gate amplifier shown in Figure 2 5 Derive the output impedance 6 Derive the voltage gain
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