4 17 2008 Lecture 21 Av Roll Off due to CL OUTLINE The impedance of CL decreases at high frequencies so that it shunts some of the output current to ground Frequency Response 0 Review of basic concepts high frequency MOSFET model CS stage CG stage Source follower Cascode stage EE105 Spring 2008 In general if node j in the signal path has a small signal resistance of Rj to ground and a capacitance Cj to ground then it contributes a pole at frequency RjCj 1 Lecture 21 Slide 1 Prof Wu UC Berkeley EE105 Spring 2008 Pole Identification Example 1 Prof Wu UC Berkeley 0 1 RG Cin EE105 Spring 2008 Lecture 21 Slide 2 Pole Identification Example 2 0 p1 p2 Lecture 21 Slide 3 1 RD C L Prof Wu UC Berkeley p1 1 1 RG Cin g m EE105 Spring 2008 Recall that a pole is computed by finding the resistance and capacitance between a node and AC GROUND It is not straightforward to compute the pole due to CF in the circuit below because neither of its terminals is ggrounded p2 Lecture 21 Slide 4 Prof Wu UC Berkeley If Av is the voltage gain from node 1 to 2 then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2 V1 V2 V1 V1 1 Z1 Z F ZF ZF Z1 V1 V2 1 Av 1 V1 V2 V V2 2 Z 2 Z F ZF ZF Z2 V1 V2 1 1 EE105 Fall 2007 Lecture 21 Slide 5 Prof Wu UC Berkeley 1 RD C L Miller s Theorem Dealing with a Floating Capacitance EE105 Spring 2008 1 RD C L 1 Av g m RD j CL RD gm 1 j RD CL Reading Chapter 11 p EE105 Spring 2008 Lecture 21 Slide 6 A v Prof Wu UC Berkeley 1 4 17 2008 Miller Multiplication Application of Miller s Theorem Applying Miller s theorem we can convert a floating capacitance between the input and output nodes of an amplifier into two grounded capacitances The capacitance at the input node is larger than the original floating capacitance Z2 ZF 1 1 Av 0 1 1 j C F 1 1 j 1 1 C F Av Av in Z1 1 RG 1 g m RD C F out 1 ZF j C F 1 1 Av 1 Av j 1 Av C F EE105 Spring 2008 Lecture 21 Slide 7 Prof Wu UC Berkeley EE105 Spring 2008 1 1 C F RD 1 g m RD Lecture 21 Slide 8 Prof Wu UC Berkeley MOSFET Intrinsic Capacitances High Frequency MOSFET Model The MOSFET has intrinsic capacitances which affect its performance at high frequencies The gate oxide capacitance can be decomposed into a capacitance between the gate and the source C1 and a capacitance between the gate and the drain C2 1 gate oxide capacitance between the gate and channel 2 overlap and fringing capacitances between the gate and the source drain regions and 3 source bulk drain bulk junction capacitances CSB CDB EE105 Spring 2008 Lecture 21 Slide 9 Prof Wu UC Berkeley In saturation C1 2 3 Cgate and C2 0 Cgate CoxWL C1 in parallel with the source overlap fringing capacitance CGS C2 in i parallel ll l with ith th the d drain i overlap fringing l f i i capacitance it CGD EE105 Spring 2008 Lecture 21 Slide 10 Example CS stage with MOSFET capacitances explicitly shown Prof Wu UC Berkeley Transit Frequency Simplified circuit for high frequency analysis The transit or cut off frequency fT is a measure of the intrinsic speed of a transistor and is defined as the frequency where the current gain falls to 1 Conceptual set up to measure fT I out g mVin I in Vin Zin 1 I out 1 g m Zin g m I in j T Cin g T m Cin 2 f T EE105 Spring 2008 EE105 Fall 2007 Lecture 21 Slide 11 Prof Wu UC Berkeley EE105 Spring 2008 Lecture 21 Slide 12 gm CGS Prof Wu UC Berkeley 2 4 17 2008 Small Signal Model for CS Stage Applying Miller s Theorem 0 p in 1 RThev Cin 1 g m RD CGD p out 1 1 CGD RD Cout 1 g R m D Note that p out p in EE105 Spring 2008 Lecture 21 Slide 13 Prof Wu UC Berkeley EE105 Spring 2008 Lecture 21 Slide 14 Prof Wu UC Berkeley Direct Analysis of CS Stage I O Impedances of CS Stage Direct analysis yields slightly different pole locations and an extra zero 0 z gm C XY 1 p1 1 g m RD C XY RThev RThevCin RD C XY Cout 1 g m RD C XY RThev RThevCin RD C XY Cout p2 RThev RD CinC XY Cout C XY Cin Cout EE105 Spring 2008 Lecture 21 Slide 15 Prof Wu UC Berkeley CG Stage Pole Frequencies Z in 1 j CGS 1 g m RD CGD EE105 Spring 2008 p X 0 1 RD j CGD CDB Lecture 21 Slide 16 Prof Wu UC Berkeley AC Analysis of Source Follower 0 CG stage with MOSFET capacitances shown Z out 1 1 RS C X g m The transfer function of a source follower can be obtained by direct AC analysis similarly as for the emitter follower C X CGS CSB p Y 1 RDCY CY CGD C DB EE105 Spring 2008 EE105 Fall 2007 Lecture 21 Slide 17 Prof Wu UC Berkeley C 1 j GS vout gm vin a j 2 b j 1 EE105 Spring 2008 a RS CGD CGS CGD C SB CGS C SB gm b RS CGD Lecture 21 Slide 18 CGD C SB gm Prof Wu UC Berkeley 3 4 17 2008 Example Source Follower Input Capacitance vout vin C 1 j GS gm 2 a j b j 1 Recall that the voltage gain of a source follower is Av Follower stage with MOSFET capacitances shown CXY can be decomposed into CX and CY at the input and output nodes nodes respectively 0 C X 1 Av CGS a RS C GD 1C GS 1 C GD 1 C GS 1 C SB 1 C GD 2 C DB 2 g m1 b R S C GD 1 EE105 Spring 2008 Cin CGD C GD 1 C SB 1 C GD 2 C DB 2 g m1 Lecture 21 Slide 19 Prof Wu UC Berkeley Example EE105 Spring 2008 Lecture 21 Slide 20 Prof Wu UC Berkeley EE105 Spring 2008 Lecture 21 Slide 22 Source Follower as Active Inductor Z out Example 3 0 CASE 2 RG 1 gm Z out A follower is typically used to lower the driving impedance i e RG is large compared to 1 gm so that the active inductor characteristic on the right is usually observed EE105 Fall 2007 Prof Wu UC Berkeley j RG CGS 1 j CGS g m CASE 1 RG 1 gm EE105 Spring 2008 Prof Wu UC Berkeley vX j RG CGS 1 iX j CGS g m 1 CGS 1 1 g m1 rO1 rO 2 Lecture …
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