UNIVERSITY OF CALIFORNIA AT BERKELEYCollege of EngineeringDepartment of Electrical Engineering and Computer SciencesEE105 Lab Exp er imentsPrelab 8: Multi-stage AmplifiersName:Lab Section:−+VBIAS1−vin+RSQ1Q2−+VBIAS2VCC= 5 VISU PvOU TFigure 1: Cascode amplifier with ideal current source1. The cascode in Figure 1 is biased by an ideal current source. Let RS= 51 Ω, IS= 1 × 10−15A,VA= 100 V, β = 200, ISU P= 1 mA, T = 300 K, vOU T ,DC= 3.5 V, and VBIAS2= 2 V. CalculateVBIAS1to match these biasing conditions.VBIAS1=122. What is the gain of this amplifier?Av=−vIN+RSQ1RCIBIAS1vOU T 1Q2VCC= 5 VvOU T 2Q3Q4RREFIBIAS2Figure 2: Multi-stage amplifier3. Now construct a SPICE netlist for the multi-stage amplifier shown in Figure 2. Let RC= 10 kΩ,RS= 51 kΩ, and RREF= 200 Ω. Bias transistor Q1with VBE1= 560 mV. What is the small signalgain (Av1) b e tween vINand vOU T 1? What is the small signal gain (Av2) b e tween vOU T 1and vOU T 2?Using Av1and Av2, find the overall gain (Av,tot) between vINand vOU T 2. Attach the SPICE netlistto the end of this
View Full Document
Unlocking...