Lecture 15 OUTLINE MOSFET structure operation qualitative Review of electrostatics The N MOS capacitor Electrostatics Charge vs voltage characteristic Reading Chapter 6 1 6 2 1 EE105 Fall 2007 Lecture 15 Slide 1 Prof Liu UC Berkeley The MOSFET GATE LENGTH Lg Metal Oxide Semiconductor Field Effect Transistor OXIDE THICKNESS Tox Gate Source Drain Substrate M Bohr Intel Developer Forum September 2004 JUNCTION DEPTH Xj N channel P channel MOSFETs operate in a complementary manner CMOS Complementary MOS EE105 Fall 2007 Lecture 15 Slide 2 CURRENT Current flowing through the channel between the source and drain is controlled by the gate voltage VTH GATE VOLTAGE Prof Liu UC Berkeley N Channel MOSFET Structure Circuit symbol The conventional gate material is heavily doped polycrystalline silicon referred to as polysilicon or poly Si or poly Note that the gate is usually doped the same type as the source drain i e the gate and the substrate are of opposite types The conventional gate insulator material is SiO2 To minimize current flow between the substrate or body and the source drain regions the p type substrate is grounded EE105 Fall 2007 Lecture 15 Slide 3 Prof Liu UC Berkeley Review Charge in a Semiconductor Negative charges Conduction electrons density n Ionized acceptor atoms density NA Positive charges Holes density p Ionized donor atoms density ND The net charge density C cm3 in a semiconductor is q p n N D N A Note that p n ND and NA each can vary with position The mobile carrier concentrations n and p in the channel of a MOSFET can be modulated by an electric field via VG EE105 Fall 2007 Lecture 15 Slide 4 Prof Liu UC Berkeley Channel Formation Qualitative As the gate voltage VG is increased holes are repelled away from the substrate surface VG VTH The surface is depleted of mobile carriers The charge density within the depletion region is determined by the dopant ion density As VG increases above the threshold voltage VTH a layer of conduction electrons forms at the substrate surface VG VTH For VG VTH n NA at the surface The surface region is inverted to be n type The electron inversion layer serves as a resistive path channel for current to flow between the heavily doped i e highly conductive source and drain regions EE105 Fall 2007 Lecture 15 Slide 5 Prof Liu UC Berkeley Voltage Dependent Resistor In the ON state the MOSFET channel can be viewed as a resistor Since the mobile charge density within the channel depends on the gate voltage the channel resistance is voltage dependent EE105 Fall 2007 Lecture 15 Slide 6 Prof Liu UC Berkeley Channel Length Width Dependence Shorter channel length and wider channel width each yield lower channel resistance hence larger drain current Increasing W also increases the gate capacitance however which limits circuit operating speed frequency EE105 Fall 2007 Lecture 15 Slide 7 Prof Liu UC Berkeley Comparison BJT vs MOSFET In a BJT current IC is limited by diffusion of carriers from the emitter to the collector IC increases exponentially with input voltage VBE because the carrier VBE VT e concentration gradient in the base is proportional to In a MOSFET current ID is limited by drif of carriers from the source to the drain ID increases linearly with input voltage VG because the carrier concentration in the channel is proportional to VG VTH In order to understand how MOSFET design parameters affect MOSFET performance we first need to understand how a MOS capacitor works EE105 Fall 2007 Lecture 15 Slide 8 Prof Liu UC Berkeley MOS Capacitor A metal oxide semiconductor structure can be considered as a parallel plate capacitor with the top plate being the positive plate the gate insulator being the dielectric and the p type semiconductor substrate being the negative plate The negative charges in the semiconductor for VG 0 are comprised of conduction electrons and or acceptor ions In order to understand how the potential and charge distributions within the Si depend on VG we need to be familiar with electrostatics EE105 Fall 2007 Lecture 15 Slide 9 Prof Liu UC Berkeley Gauss Law E is the net charge density is the dielectric permittivity If the magnitude of electric field changes there must be charge In a charge free region the electric field must be constant Gauss Law equivalently says that if there is a net electric field leaving a region there must be positive charge in that region E dV dV V V Q dV E dV E dS V V S Q E dS EE105 Fall 2007 Lecture 15 Slide 10 The integral of the electric field over a closed surface is proportional to the charge within the enclosed volume Prof Liu UC Berkeley Gauss Law in 1 D E dE dx dE dx x x E x E x0 dx x0 Consider a pulse charge distribution E x x 0 Xd x qN A EE105 Fall 2007 Lecture 15 Slide 11 0 Xd x Prof Liu UC Berkeley Electrostatic Potential The electric field force is related to the potential energy dV E dx d 2V x x 2 dx Note that an electron q charge drifs in the direction of increasing potential dV Fe qE q dx E x x 0 qN A EE105 Fall 2007 Xd x 0 V x Xd Lecture 15 Slide 12 x 0 Xd Prof Liu UC Berkeley x Boundary Conditions Electrostatic potential must be a continuous function Otherwise the electric field force would be infinite Electric field does not have to be continuous however Consider an interface between two materials x E1 E2 1 2 E dS E S 1 S 1 2 E2 S Qinside If Qinside x 0 0 then 1 E1S 2 E2 S 0 E1 2 E2 1 Discontinuity in electric displacement E charge density at interface EE105 Fall 2007 Lecture 15 Slide 13 Prof Liu UC Berkeley MOS Capacitor Electrostatics Gate electrode Since E x 0 in a metallic material V x is constant Gate electrode gate insulator interface The gate charge is located at this interface E x changes to a non zero value inside the gate insulator Gate insulator Ideally there are no charges within the gate insulator E x is constant and V x is linear Gate insulator semiconductor interface Since the dielectric permittivity of SiO2 is lower than that of Si E x is larger in the gate insulator than in the Si Semiconductor If x is constant non zero then V x is quadratic EE105 Fall 2007 Lecture 15 Slide 14 Prof Liu UC Berkeley MOS Capacitor VGB 0 If the gate and substrate materials are not the same typically the case there is a built in potential 1V across the gate insulator Positive charge is located at the gate interface and negative charge in the Si The substrate surface region is depleted of holes down to a depth Xdo x Xdo x 0 V x tox 0 EE105 Fall 2007 VS o Xdo Qdep x Lecture 15 Slide 15 Prof
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