1Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31Lecture 31: Prof J. S. SmithDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithContextWe are looking at more examples of single transistor active circuits and typical design problems, and starting multi-stage amplifiersDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithReadingzWe are starting on chapter 9, multi-stage amplifiersHomework:Make sure you do problem P8.18, not example E8.18Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithLecture OutlinezExample: Voltage regulatorzTransimpedance AmplifierzSource FollowerzCurrent MirrorzPush-Pull AmplifierzMultistage Amplifiers2Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithVoltage regulatorzOne problem that often arises is that of taking an imperfect power supply and creating a regulated power supply. For example, Electrically programmable memories are often very sensitive to voltage. zThere are two basic solutions to the voltage regulation problem: –Series regulators–Shunt regulatorszAnd there are Analog and Switched solutionsDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithSeries regulatorszIn a series regulator, a higher voltage unregulated supply is reduced and regulated by putting a device in series with the source−+dunregulateV−+regulatedVIn this shunt regulator, we need the unregulated voltage to be sufficiently higher than the regulation point so that the deviceworks properly, and the power Iload(Vunregulated-Vregulated) is lost. Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithShunt regulatorszIn a shunt regulator, a higher voltage unregulated supply which has some source resistance is shunted to ground by a parallel device in order to keep the regulated voltage from going too high−+dunregulateV−+regulatedVIn a shunt regulator, the controlling device can even be turned off, so that the power lost can be reduced to zero in the case where power is most critical, but the power lost can be high if the unregulated voltage goes up, or if the source impedance is low. The power (Isource-Iload)(Vunregulated) is lost Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithUseszFor a battery powered device, you would want to use a series regulator to avoid draining the batteryzIf the source of power can't be depleted, you might want to use a shunt regulator so that losses only occur when you are trying to throw away power anyway!–Solar powered device or array–Passive RFID tags–Wind or Small hydroelectric(What does an automobile use?)3Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithSeries regulatorszHere is a linear series regulator using a common gate connected transistor. Since the drain current is relatively independent of the drain voltage when the transistor is in saturation, regulation can be good as long as sufficient drop is available.−+dunregulateV−+regulatedVIn this series regulator, we need the unregulated voltage to be sufficiently higher than the regulation point so that the transistorwill be in forward saturation (or the regulation will be poor)The power Iload(Vunregulated-Vregulated) is lost. For large currents, with devices that need approximately a volt drop across them, this is a large loss Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithShunt regulatorszIn this shut regulator, a common source device is used as an active load configuration to pull down excessive voltage at the load.−+SV−+DDVNIDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithLoad line diagramzIn order to find the operating point for the regulator at a given supply voltage, we draw a load line for the resistor, and the current available from the resistor as a function of VDDRVSRISVTnVNIDDVFor no load current, the pointwhere the current available the resistor is consumed bythe transistor is the operatingpointDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithRegulationzTwo questions that we can ask about regulation: –If the supply voltage varies, how much does the output voltage vary?–If the load current varies, how much does the output voltage vary?zIf the load current is held constant, a the change in the output voltages is given by the variation in the supply voltage divided down by a resistive divider.zSince the drain current is a relatively insensitive function of the drain voltage, we get that the change in the drain current is just:So the FET in small signal looks like a resistor with a resistance:mGSDgvi =⎟⎟⎠⎞⎜⎜⎝⎛=mngR14Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. Smithshunt regulatorzSo we havezLet’s hold VDD constant and vary the load current by a small amount. In small signal, this looks like a current being divided between two resistors to SS ground RgRggVsVmmmDD+=+=∆∆1111R⎟⎟⎠⎞⎜⎜⎝⎛mg1LISo a small change in the outputcurrent sees a source impedance:1111+=+==mmmORgRRgRgZIn both cases, the regulation is poor because gm is relatively smallDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithAdding voltage gainzIf we add gain in the small signal voltage at the gate of the FET, we can improve regulation−+SV−+DDVNIA−+RAgVsVmDD+=∆∆11RDDVVA ≈⇒>> 1for RVDepartment of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithAdd Voltage gain: common gate stagezIf we add gain in the small signal voltage at the gate of the FET, we can improve regulation−+SV−+DDVNI21111RgRgRAgVsVmpsmmDD+=+=∆∆As VDD goes up, the current through the PMOS transistor goes up: so the small signal voltage mpgspgvi =−+2VSR2RDDmpmpgsVRggRvRiv ∆===222Department of EECS University of California, BerkeleyEECS 105 Spring 2004, Lecture 31 Prof. J. S. SmithTransimpedance AmplifierzThe transimpedance is:Figure
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