Lecture 18ANNOUNCEMENTS•HW#10 will be posted tonightOUTLINE•HW#10 will be posted tonight• Basic MOSFET amplifier• MOSFET biasing• MOSFET current sources• Common‐source amplifierReading: Chapter 7.1‐7.2EE105 Fall 2007 Lecture 18, Slide 1Prof. Liu, UC BerkeleyBasic MOSFET Amplifier• For large small‐signal gain, the MOSFET should be operated in the saturation region.EE105 Fall 2007 Lecture 18, Slide 2Prof. Liu, UC BerkeleyÆ Voutshould not fall below Vin by more than VTH. MOSFET BiasingThe voltage at node X is determined by VDD, R1, and R2:AlsoDDXVRRRV212+=RIVV+=Also,SDGSXRIVV+=()21THGSoxnDVVWCI−=µ()THDDTHGSVRRVRVVVVV 221211⎟⎠⎞⎜⎜⎝⎛−+++−−=⇒()2THGSoxnDVVLCµSRWCVRRµ1 where121=⎠⎜⎝+EE105 Fall 2007 Lecture 18, Slide 3Prof. Liu, UC BerkeleySoxnRLCµSelf‐Biased MOSFET Stage• Note that there is no voltage dropped across RGÆM1is operating in the saturationregion.ÆM1 is operating in the saturation region.DDDSGSDDVIRVRI=++EE105 Fall 2007 Lecture 18, Slide 4Prof. Liu, UC BerkeleyMOSFETs as Current Sources• A MOSFET behaves as a current source when it is operating in the saturation region.g• An NMOSFET draws current from a point to ground (“sinks current”), whereas a PMOSFET draws curre nt from VDDto a point (“sources current”)point (sources current ).EE105 Fall 2007 Lecture 18, Slide 5Prof. Liu, UC BerkeleyCommon‐Source Stage: λ= 0Amplifier circuit Small-signal analysis circuitfor determining voltage gain, AvRIWCRgA==µ2Small-signal analysis circuit fordetermining output resistance, RoutinDDoxnDmvRRILCRgA∞=−=−=µ2EE105 Fall 2007 Lecture 18, Slide 6Prof. Liu, UC BerkeleyDoutRR=Common‐Source Stage: λ≠ 0• Channel‐length modulation results in reduced small‐signal voltage gain and amplifier output resistance.g g p pSmall-signal analysis circuitfor determining voltage gain, AvSmall-signal analysis circuit fordetermining output resistance, Rout()||()inODmvRrRgA||||∞=−=EE105 Fall 2007 Lecture 18, Slide 7Prof. Liu, UC BerkeleyODoutrRR||=CS Gain Variation with L• An ideal current source has infinite small‐signal resistance.ÆThe largest Avis achieved with a current source as the load. gv√• Since λis inversely proportional to L, Avincreases with √L. DoxnWLCILWCµµ22EE105 Fall 2007 Lecture 18, Slide 8Prof. Liu, UC BerkeleyDoxnDomvIWLCILrgAµλ2∝==CS Stage with Current‐Source Load• Recall that a PMOSFET can be used as a current source from VDD.ÆUse a PMOSFET as a load of an NMOSFET CS amplifier.ÆUse a PMOSFET as a load of an NMOSFET CS amplifier.()211||||OOmvrrRrrgA=−=EE105 Fall 2007 Lecture 18, Slide 9Prof. Liu, UC Berkeley21||OOoutrrR=PMOS CS Stage with NMOS Load • An NMOSFET can be used as the load for a PMOSFET CS amplifier. 212)||(OOmvrrgA−=21212||OOoutOOmvrrR =EE105 Fall 2007 Lecture 18, Slide 10 Prof. Liu, UC BerkeleyCS Stage with Diode‐Connected LoadAmplifier circuit Small-signal analysis circuitincluding MOSFET output resistances:0≠λ()1/1:0 IfLWA=λ1221||||1OOmmvrrggA⎟⎟⎠⎞⎜⎜⎝⎛−=ÆAi l btit ilddtt()()2121/LWggAmmv−=⋅−=122||||1OOmoutrrgR =EE105 Fall 2007 Lecture 18, Slide 11 Prof. Liu, UC BerkeleyÆAvis lower, but it is less dependent on process parameters (µnand Coxand drain current (ID).CS Stage with Diode‐Connected PMOS Load1⎞⎜⎛:0≠λ21121||||1oommvrrggA⎟⎠⎞⎜⎜⎝⎛−=211||||1oomoutrrgR =EE105 Fall 2007 Lecture 18, Slide 12 Prof. Liu, UC BerkeleyCS Stage with DegenerationAmplifier circuit Small-signal analysis circuitfor determining voltage gain, AvSDvRgRA+−==1 :0 IfλEE105 Fall 2007 Lecture 18, Slide 13 Prof. Liu, UC BerkeleymgExample• A diode‐connected device degenerates a CS stage.11DvggRA+−=EE105 Fall 2007 Lecture 18, Slide 14 Prof. Liu, UC Berkeley21 mmggRoutof CS Stage with Degeneration• Degeneration boosts the output impedance:Small-signal analysis circuit fordetermining output resistance, RoutCurrent flowing down throughrisCurrent flowing down through rois()SXmXSXmXmXRigiRigivgi+=−−=− 1()SXRiv −=1SXmXg()()XXSXSXmXORrgrRRgrvvRiRigir+≅++=++1EE105 Fall 2007 Lecture 18, Slide 15 Prof. Liu, UC Berkeley()SOmOSSmOXXRrgrRRgri+≅++=1Output Impedance Examples⎞⎛1⎟⎟⎠⎞⎜⎜⎝⎛+≅21111mmOoutggrR1211 OOOmoutrrrgR+≈EE105 Fall 2007 Lecture 18, Slide 16 Prof. Liu, UC BerkeleyCS Stage with Gate Resistance• For low signal frequencies, the gate conducts no current.ÆGateresistance does not affect the gain or I/O impedancesÆGate resistance does not affect the gain or I/O impedances.EE105 Fall 2007 Lecture 18, Slide 17 Prof. Liu, UC BerkeleyCS Core with BiasingDvRRRRRRA−⋅+=1||||21DmvRgRRRRRA21||||−=SmGRgRRR++1||21DmGvgRRR21||+EE105 Fall 2007 Lecture 18, Slide 18 Prof. Liu, UC
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