1EE105 - Fall 2005Microelectronic Devices and CircuitsLecture 29BJT BiasingSummary2AnnouncementsLab 9 reports due now!Check your homework/lab grades next week!Reading: Chapter 9.6, 10.7.2Final: December 20, 12:30-3:30pm, Bechtel Aud. (Sibley)3Lecture MaterialLast lectureBJT amplifiers: common emitter, common collector, common baseThis lectureBJT biasingExample amplifierReview4PNP TransistorBase (N)Emitter (P)Collector (P)EIBICI−EBV+−ECV+−5Multi-Stage Voltage Amplifier6Cutting Through the ComplexityTwo Approaches:1. Eliminate “background” transistors to reduceclutter2. Identify the “signal path” between the inputand output27First Approach: Find I & V Sources8What’s Left? Voltage at base ofQ2is set by totempole 9Second Approach: Find Signal Path10Identifying the StagesFirst stage (or two stages): CS/CB cascodeSecond stage (or two stages): CD/CC voltage bufferWhy does this make sense for a voltage amplifier?11Find Key Two-Port ParametersOutput resistance of cascode:(){}2222/,||1(||SmoocCBCSoutRrgrrRπ+=()6661SmoupocRgrRr +==12Two-Port Parameters (Cont.)313Output Resistance and Voltage GainSource resistance of the CC stage is the output resistanceof the CD stage (small)434,4,1111mommoCCSmCCoutoutgggRgRR ≈β+=β+==Open-circuit voltage gain Av(last two stages have nearly unity gain): ()()766211||omooomvrgrrgA +β−=14Output Swing: VOUT,MINMinimum output voltage: M10, M3, and Q2are “suspects”M10goes into triode when VOUT= 0.5 VM3goes into triode when VSD3= 0.5 V ÆVOUT= 0.5 V – 0.7 V = -0.2 VQ2goes into saturation when VCE2= 0.1 Vor VBC2= 0.6 VVOUT= VB2– VBC2+ VSG3– VBE4= 2 V – 0.6 V + 1.5 V – 0.7 VVOUT= 2.2 V15Output Swing: VOUT,MAXMaximum output voltage: Q4, M5, and M6are “suspects”Q4 goes into saturation when VCE4= 0.1 V Æ VOUT= 4. 9 VM5goes triode when VSD5= 0.5 V Æ VOUT= 3.8 VM6goes triode when VSD6= 0.5 V ÆVOUT= VS6– 0.5 V + VSG3– VBE4= 3.5 – 0.5 + 1.5 – 0.7 V = 3.8 V16Insight into the Frequency Response17Qualitative InsightCould always do “brute force” open-circuit time constantsCS*-CB is a wideband stage … so is the CD-CC bufferLook for large RTxCxproducts: high-impedance nodesare likely candidates18Node X“High impedance node” is node X … look at RTxCxCapacitance:Cx= Cgd6+ Cμ2+ Cgd3+ CM3Miller for CDstage (M3)419Finding the Miller Capacitance CM3Gain across Cgs3: 3333/1LmLgsvCRgRA+= CD X Cgs3 RL3 RL3= Rin4 = 20Dominant Pole of Voltage AmplifierCDinCBoutinoutTxRRRRR,,32||||==ooomoSmoocTxrrgrRrgrrRβ+≅+=π 27662222||)1())||(1(||Thévenin resistance for CX:Dominant pole:xTxCR≈ω−1121EECS 105 in the Grand Scheme22EECS 105 in the Grand Scheme Example: Cell
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