UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE105 Lab Experiments Experiment 4 Single Stage BJT Amplifiers Common Emitter 1 Objective Design and analysis of analog amplifiers is not often done on the individual transistor level but instead by grouping together known configurations of single transistor amplifiers to create a new amplifier with just the right properties for the application Those properties are input impedance gain and output impedance Before analyzing and building these robust multi transistor amplifiers however you must first understand the basics of the single transistor amplifier case The objective of this lab is to familiarize you specifically with the single stage BJT common emitter CE amplifier and all its wonderful properties The next lab will cover the same properties of the common base and common collector a k a emitter follower cases By the end of this lab and the next you will begin to see why these different configurations are useful and how they might be fit together to achieve specific properties 2 Materials Component 2N4401 NPN BJT 8 speaker 1 k resistor 10 k resistor 10 F capacitor 10 k potentiometer Quantity 1 1 1 1 1 1 Table 1 Components used in this lab 3 Procedure 3 1 Biasing for Maximum Gain The properties of a common emitter amplifier are greatly affected by the DC bias point and specific biasing circuitry In this case we are using a voltage source and a pull up resistor to bias the collector and the DC offset on the function generator to bias the base In multi transistor amplifiers however a transistor is generally biased using other transistors to acheive the greatest small signal gain 1 Build the circuit shown in Figure 1 a simple common emitter amplifier with no load attached Let RC 1 k and VCC 5 V Note You may want to use the parameter analyzer test fixture since you ll use ICS to analyze the circuit 2 Using ICS perform a sweep of VIN from 0 V to 1 V and graph VOUT vs VIN Using the plot find the DC bias of the amplifier that achieves the maximum gain What is the gain What are VIN and VOUT at the point of maximum gain 1 3 2 PROCEDURE VCC RC IIN vin vout VIN Figure 1 CE amplifier 3 Using a load line for the pull up resistor on a BJT I V curve explain why a BJT has very low gain if it is not biased in the forward active region 3 2 Amplifier Properties a k a Two Port Parameters The operational characteristics of an amplifier can be quantified by three properties input impedance gain and output impedance These three properties are called the two port parameters of the amplifier The goal now is to measure and to learn about these properties for the CE amplifier so that we may later on use this general knowledge in our high level design of multistage amplifiers 1 Sweep VIN from 0 V to 1 V and plot IIN vs VIN using ICS What is the input resistance when VIN is biased to achieve the maximum gain 2 Using the function generator apply a 20 mV peak to peak sine wave at the input with a DC offset corresponding to the DC bias point giving the maximum gain Measure the peak to peak amplitude of the signal at the output using the oscilloscope What is the gain measured with the oscilloscope Is the gain measured with the oscilloscope roughly the same as the gain you measured with ICS 3 Increase the amplitude of the input signal until the output waveform appears to be clipped flattened on the top and bottom Why does clipping happen at the top Why does clipping happen at the bottom You may find graphs useful in your explanation Approximately how large can the output wave be without clipping The maximum amplitude without clipping is called the output voltage swing 4 Attach a 10 F AC coupling capacitor and a 10 k potentiometer at the output as shown in Figure 2 The potentiometer is used to simulate a load for the amplifier to drive Why is the capacitor necessary Hint Consider the DC bias 5 Apply the same 20 mV peak to peak signal at the input and adjust the resistance of the potentiometer until the amplitude of the signal across the potentiometer is exactly half of the amplitude of the signal with no load attached The resistance of the potentiometer at this point will be equal to the output resistance 3 3 Emitter Degeneration Emitter degeneration refers to the placement of a resistor on the emitter of a common emitter amplifier Here we will analyze the effect of this resistance on the common emitter amplifier 1 Build the circuit in Figure 3 let VCC 5 V RC 10 k and RE 1 k 3 3 PROCEDURE VCC RC C RL vout vin VIN Figure 2 CE amplifier with load attached VCC RC vout vin VIN RE Figure 3 CE amplifier with emitter degeneration 2 Bias the circuit for maximum gain What is the DC operating point What is the gain Av at this point Is it more or less than the gain found without the degenerating resistor Give an explanation for what s going on in the circuit that causes this change in gain 3 Measure the input and output impedances 4 Showing all steps calculate the theoretical values of the input and output impedances as well as the gain Use 270 which is about what you should ve measured in Experiment 3 5 Why might emitter degeneration be useful 3 4 The World s Worst Speaker Amplifier This part will demonstrate the capabilities of your CE amplifier on a physically observable load 1 Apply a 1 kHz 10 mV amplitude sine wave directly to the two terminals of the speaker Qualitatively observe the volume 2 Build the circuit shown in Figure 2 Let RC 1 k and C 10 F 3 Bias VIN for maximum gain you should have the bias voltage from a previous part and apply a 1 kHz 10 mV amplitude sine wave at the input Attach the speaker to the output and qualitatively observe the volume Is it louder quieter or just as loud as when the speaker is direcly hooked up to the function generator Explain this result
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