EECS 105 Spring 2005 Lecture 11 R T Howe Lecture 11 Last time MOS common source amplifier Today MOSFET small signal model transconductance and output resistance Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Why Find an Incremental Model Signals of interest in analog ICs are often of the form vGS t VGS vgs t Direct substitution into iD f vGS vDS is tedious AND doesn t include charge storage effects pretty rough approximation Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Which Operating Region Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Changing One Variable at a Time iD 0 5 1 1 5 2 vGS Assumption VDS VDS SAT VGS VTn square law Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe The Transconductance gm Defined as the change in drain current due to a change in the gate source voltage with everything else constant iD gm vGS VGS VDS iD vGS VGS VDS Square law MOSFET saturation region iD W 2 L n Cox vGS VTn 2 1 n v DS Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Another Way to Find gm Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Evaluating gm Square law characteristic H S 1st Edition gm Linear characteristic better for submicron CMOS iD SAT vsatWCox vGS VTn 1 n v DS Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Output Resistance ro Defined as the inverse of the change in drain current due to a change in the drain source voltage with everything else constant Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Evaluating ro i ro D v DS VGS VDS 1 Typical value Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Putting Together a Circuit Model gate id drain vgs vds source Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Role of the Substrate Potential Need not be the source potential but VB VS Effect changes threshold voltage which changes the drain current substrate acts like a backgate g mb iD v BS Q iD v BS Q Q VGS VDS VBS Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Backgate Transconductance Result g mb Dept of EECS iD v BS Q iD VTn VTn v Q BS Q University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Four Terminal Small Signal Model Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe MOSFET Capacitances in Saturation Gate source capacitance channel charge is not controlled by drain in saturation Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Gate Source Capacitance Cgs Wedge shaped charge in saturation effective area is 2 3 WL see H S 4 5 4 for details C gs 2 3 WLCox Cov Overlap capacitance along source edge of gate Cov LDWCox Underestimate due to fringing fields Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Gate Drain Capacitance Cgd Not due to change in inversion charge in channel Overlap capacitance Cov between drain and source is Cgd Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Junction Capacitances Drain and source diffusions have different junction capacitances since VSB and VDB VSB VDS aren t the same Complete model without interconnects Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe Small Signal PMOS Model Dept of EECS University of California Berkeley EECS 105 Spring 2005 Lecture 11 R T Howe MOSFET SPICE Model Many levels we will use the square law Level 1 model See H S 4 6 for details Dept of EECS University of California Berkeley
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