EE105 Fall 2006 Microelectronic Devices and Circuits Prof Jan M Rabaey jan eecs Nate Pletcher Lecture 6 MOSCAP Overview Announcements Labs start this week Lab report guide posted on website HW2 and HW1 solutions posted Last lecture Diode operation This lecture Diode wrap up fabrication and small signal model MOS capacitor 2 Diode I V Curve Id Is qVkTd I d I S e 1 I d Vd I S 1 qVd kT Diode IV relation is an exponential function This exponential is due to the Boltzmann distribution of carriers versus energy For reverse bias the current saturations to the drift current due to 3 minority carriers Fabrication of IC Diodes p cathode anode p n p type n well p type Start with p type substrate Create n well to house diode p and n diffusion regions are the cathode and annode N well must be reverse biased from substrate Parasitic resistance due to well resistance 4 Diode Small Signal Model The I V relation of a diode can be linearized 5 Diode Small Signal Model Expand the current equation to find s s resistance qVd qvd d vd q VkT 1 I S e kT e kT I D iD I S e 2 3 x x e x 1 x L 2 3 q Vd vd I D iD I D 1 L kT iD qvd g d vd kT 6 Diode Capacitance We have already seen that a reverse biased diode acts like a capacitor since the depletion region grows and shrinks in response to the applied field the capacitance in forward bias is given by Cj A S X dep 1 4C j 0 But another charge storage mechanism comes into play in forward bias Minority carriers injected into p and n regions stay in each region for a while On average additional charge is stored in diode 7 Charge Storage pn 0 e p side n p 0e q Vd vd kT n side q Vd vd kT pn 0 np0 Wp xp xn Wn Increasing forward bias increases minority charge density By charge neutrality the source voltage must supply equal and opposite charge 1 qI d A detailed analysis yields Cd 2 kT Time to cross junction or minority carrier lifetime 8 Diode Circuits Rectifier AC to DC conversion Peak detector AM demodulator DC restorer Clamp Voltage doubler quadrupler 9 MOS Capacitor Oxide SiO2 ox 3 9 0 Gate n poly 0 Very Thin tox 1nm Body p type substrate x s 11 7 0 MOS Metal Oxide Silicon Sandwich of conductors separated by an insulator Metal is more commonly a heavily doped polysilicon layer n or p layer NMOS p type substrate PMOS n type substrate 10 P I N Junction Gate n poly Body p type substrate Under thermal equilibrium the n type poly gate is at a higher potential than the p type substrate kT N a p ln n 550mV q ni No current can flow because of the insulator but this potential difference is accompanied with an electric field Fields terminate on charge 11 Fields and Charge at Equilibrium Vox VB Body p type substrate Eox Xd0 At equilibrium there is an electric field from the gate to the body The charges on the gate are positive The negative charges in the body come from a depletion region 12 Flat Band Condition QG VGB VFB 0 VFB 0 Body p type substrate If we apply a bias we can compensate for this built in potential VFB n p In this case the charge on the gate goes to zero and the depletion region disappears In solid state physics lingo the energy bands are flat under this condition 13 Accumulation QG Cox VGB VFB VGB VFB QB QG Body p type substrate If we further decrease the potential beyond the flatband condition we essentially have a parallel plate capacitor Plenty of holes and electrons are available to charge up the plates Negative bias attracts holes under gate 14 Depletion VGB VFB Body p type substrate QG VGB QB QB qN a X d VGB Similar to equilibrium the potential in the gate is higher than the body Body charge is made up of the depletion region ions Potential drop across the body and depletion region 15 Inversion s VGB VT Body p type substrate As we further increase the gate voltage eventually the surface potential increases to a point where the electron density at the surface equals the background ion density ns ni e q s kT Na s p At this point the depletion region stops growing and the extra charge is provided by the inversion charge at surface 16 Threshold Voltage The threshold voltage is defined as the gate body voltage that causes the surface to change from p type to n type For this condition the surface potential has to equal the negative of the p type potential We ll derive that this voltage is equal to 1 VTn VFB 2 p Cox 2q s N a 2 p 17 Inversion Stops Depletion A simple approximation is to assume that once inversion happens the depletion region stops growing This is a good assumption since the inversion charge is an exponential function of the surface potential Under this condition QG VTn QB max QG VGB Cox VGB VTn QB max 18 Q V Curve for MOS Capacitor QG n io s er v in tion e l p de a um c c n io t a ul VFB QN VGB QB max VTn VGB V In accumulation the charge is simply proportional to the applies gate body bias In inversion the same is true In depletion the charge grows slower since the voltage is applied over a depletion region 19 Numerical Example MOS Capacitor with p type substrate tox 20nm N a 5 1016 cm 3 Calculate flat band VFB n p 550 402 0 95V Calculate threshold voltage ox 3 45 10 13 F cm Cox tox 2 10 6 cm 1 VTn VFB 2 p 2q s N a 2 p Cox 2 1 6 10 19 1 04 10 12 5 1016 2 0 4 0 52V VTn 95 2 0 4 Cox 20 Num Example Electric Field in Oxide Apply a gate to body voltage VGB 2 5 VFB Device is in accumulation The entire voltage drop is across the oxide Vox VGB n p 2 5 0 55 0 4 5 V 8 10 Eox 2 10 6 cm tox tox The charge in the substrate body consist of holes QB Cox VGB VFB 2 67 10 7 C cm 2 21 Numerical Example Depletion Region In inversion what s the depletion region width and charge VB max s p p p 2 p 0 8V VB max X d max 1 qN a 2 s 2 X d max 2 sVB max qN a 144nm QB max qN a X d max 1 15 10 7 C cm 2 22 MOS CV Curve C QG Cox Cox QN VGB QB max VFB VTn VGB V VFB VTn VGB Small signal capacitance is slope of Q V curve Capacitance is linear …
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