EE105 - Spring 2007Microelectronic Devices and CircuitsLecture 6CMOS Amplifiers2CMOS Amplifiers General Considerations Common-Source Stage Common-Gate Stage Source Follower Summary and Additional Examples3Lecture Outline4Voltage Amplifier In an ideal voltage amplifier, the input impedance is infinite and the output impedance zero. But in reality, input or output impedances depart from their ideal values.5Input / Output Impedances The figure above shows the techniques of measuring input and output impedances.xxxVRi=6Common-Source StageDDoxnvDmvRILWCARgAμλ20−=−==7Operation in Saturation In order to maintain operation in saturation, Voutcannot fall below Vinby more than one threshold voltage. The condition above ensures operation in saturation. ()1Condition for M in saturation out in THDD D D GS THVVVVRIVV>−⇒− >−8CS Stage with λ=0LoutinLmvRRRRgA=∞=−=9CS Stage with λ≠0 However, channel length modulation leads to finite output resistance, ro, which is in parallel with the load resistance, RL()OLoutinOLmvrRRRrRgA||||=∞=−=10CS Gain Variation with Channel Length Since λ is inversely proportional to L, the intrinsic voltage gain actually becomes proportional to the square root of L. DoxnDoxnvIWLCILWCAμλμ22∝=11MOS Biasing()()11222211112112,212 unknows ( ), 2 equationsDD GS D SDnoxGSTHGS DDDGS TH THnox SRVVIRRRWICVVLVIRVVVVVV VRRVWCRLμμ=++=−⇒⎛⎞=− − + + −⎜⎟+⎝⎠= Voltage at X is determined by VDD, R1, and R2. VGScan be found using the equation above, and IDcan be found by using the NMOS current equation.12Self-Biased MOS Stage The circuit above is analyzed by noting M1is in saturation and no potential drop appears across RG.()212D D GS S D DDDnoxGSTHIR V RI VWICVVLμ++ ==−13Current Sources When in saturation region, a MOSFET behaves as a current source. NMOS draws current from a point to ground (sinks current), whereas PMOS draws current from VDDto a point (sources current).14CS Stage with Current-Source Load To alleviate the headroom problem, an active current-source load is used. This is advantageous because a current-source has a high output resistance and can tolerate a small voltage drop across it. ()21211||||OOoutOOmvrrRrrgA=−=15PMOS CS Stage with NMOS as Load Similarly, with PMOS as input stage and NMOS as the load, the voltage gain is the same as before.21 2(||)vmOOAgrr=−16CS Stage with Diode-Connected Load Lower gain, but less dependent on process parameters.()()121211221|| ||/1/ vm OOmvmmAg rrgWLAggWL⎛⎞=−⎜⎟⎝⎠=− ⋅ =−17CS Stage with Diode-Connected PMOS Device Note that PMOS circuit symbol is usually drawn with the source on top of the drain.⎟⎟⎠⎞⎜⎜⎝⎛−=2112||||1oommvrrggA18CS Stage with Degeneration Similar to bipolar counterpart, when a CS stage is degenerated, its gain, I/O impedances, and linearity change.10DvSmRARgλ=−+=19Example of CS Stage with Degeneration A diode-connected device degenerates a CS stage.1211DvmmRAgg=−+20CS Stage with Gate Resistance Since at low frequencies, the gate conducts no current, gate resistance does not affect the gain or I/O impedances.0GRV =21Output Impedance of CS Stage with Degeneration Similar to the bipolar counterpart, degeneration boosts output impedance.out m O S OrgrRr≈+22Output Impedance Example (I) When 1/gmis parallel with rO2, we often just consider 1/gm1122111out O mmmRr ggg⎛⎞=+ +⎜⎟⎝⎠23Output Impedance Example (II) In this example, the impedance that degenerates the CS stage is rO, instead of 1/gmin the previous example. 112 1out m O O ORgrr r≈+24CS Core with Biasing Degeneration is used to stabilize bias point, and a bypass capacitor can be used to obtain a larger small-signal voltage gain at the frequency of interest. 1212||,1|| DvvmDGSmRR RAAgRRRRRg−=⋅ =−++25Common-Gate Stage Common-gate stage is similar to common-base stage: a rise in input causes a rise in output. So the gain is positive. vmDAgR=26Signal Levels in CG Stage In order to maintain M1 in saturation, the signal swing at Voutcannot fall below Vb-VTH27I/O Impedances of CG Stage The input and output impedances of CG stage are similar to those of CB stage.out DRR=1inmRg=0λ=28CG Stage with Source Resistance When a source resistance is present, the voltage gain is equal to that of a CS stage with degeneration, only positive.1DvSmRARg=+29Generalized CG Behavior When a gate resistance is present it does not affect the gain and I/O impedances since there is no potential drop across it (at low frequencies). The output impedance of a CG stage with source resistance is identical to that of CS stage with degeneration.()1out m O S ORgrRr=+ +30Example of CG Stage Diode-connected M2 acts as a resistor to provide the bias current.()1121out m Din m m SvgRvggR=++11 121|| ||out m O S O DmRgr RrRg⎡⎤⎛⎞≈+⎢⎥⎜⎟⎢⎥⎝⎠⎣⎦31CG Stage with Biasing R1and R2provide gate bias voltage, and R3provides a path for DC bias current of M1to flow to ground. ()()33|| 1/|| 1/moutmDin m SRgvgRvR gR=⋅+32Source Follower Stage1vA <33Source Follower Core Similar to the emitter follower, the source follower can be analyzed as a resistor divider. ||1||out O LinOLmvrRvrRg=+34Source Follower Example In this example, M2acts as a current source.12121||1||OOvOOmrrArrg=+35Output Resistance of Source Follower The output impedance of a source follower is relatively low, whereas the input impedance is infinite (at low frequencies); thus, a good candidate as a buffer.11|| || ||out O L LmmRrR Rgg=≈36Source Follower with Biasing RGsets the gate voltage to VDD, whereas RSsets the drain current The quadratic equation above can be solved for ID()212DnoxDDDSTHWICVIRVLμ=−−37Supply-Independent Biasing If Rsis replaced by a current source, drain current IDbecomes independent of supply voltage. 38Example of a CS Stage (I) M1 acts as the input device and M2, M3 as the load.1123312331|| || ||1|| || ||vm OOOmout O O OmAgrrrgRrrrg⎛⎞=−⎜⎟⎝⎠=39Example of a CS Stage (II) M1acts as the input device, M3as the source resistance, and M2as the load. 231311||OvOmmrArgg=−+40Examples of CS and CG Stages With the input connected to different locations, the two circuits, although identical in other aspects, behave differently.2_1OvCGSmrARg=+[]_21111(1 ) ||vCS m m O S O OAggrRrr=− + +41Example of a Composite Stage (I) By
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