University of California Berkeley College of Engineering Dept of Electrical Engineering and Computer Sciences EE 105 Final Examination Fall 2005 Prof Borivoje Nikoli December 20 2005 Your Name Last First Guidelines Closed book and notes one 8 5 x 11 page both sides of your own notes is allowed You may use a calculator Do not unstaple the exam Show all your work and reasoning on the exam in order to receive full or partial credit You have 180 minutes 3 hrs Good luck Score Problem Points Possible 1 32 2 34 3 34 Total 100 Score 1 1 32 points MOS Transistor The following figure shows the cross section of a p well CMOS process The maximum and minimum voltage in the chip is 5V and 0V respectively lease use the following parameters p 550mV Si 11 7 SiO2 3 9 0 8 854 10 14F cm 1 ni 1010cm 3 kT q 25mV Dn 20 cm2 s Dp 10 cm2 s You can assume n 500cm2 Vs p 200cm2 Vs C A B D E P Poly Gate P N N N P Well 1E18 N substrate 1E16 a 2 pts To which voltage should terminal E be connected Explain your answer VE 2 b 6 pts If tox 5nm find VFB and VT VFB VT c 6 pts If VB 0V how would you bias terminals C and D to maximize the drain current Calculate the maximum drain current for W 5 m L 1 m VC VD ID 3 d 10 pts If VA VB VD 0V draw the potential profile across the cutting line from the gate to n substrate when VC 2V 4 e 4 pts With VE 5V how would you bias the other terminals to form an npn BJT operating in forward bias region f 4 pts If the depth of the n regions is 0 2 m and assuming only lateral conduction and VBE 0 7V and no recombination in base region calculate the maximum IC for the BJT from part e 5 2 34 points Bipolar current source Given VCC 5V F 0 50 VBE 0 7V VCES 0 1V RREF 5k VA 20V q 1 6 x 10 19 C kT q 25mV Dn 25 cm2 s For all transistors Emitter area AE 25 m2 emitter width WE 30 nm base width WB 50 nm emitter doping NdE 1019cm 3 base doping NaB 1017 cm 3 collector doping NdC 1016 cm 3 a 2 pts Find the current IREF IREF 6 b 8 pts Assuming that Q3 is in the forward active region find the ratio IOUT IREF as a function of F You can ignore the base width modulation but do not ignore the base currents Please leave the answer in the symbolic form IOUT IREF 7 c 4 pts How does the ratio of IOUT IREF change if you account for the base width modulation A qualitative answer is sufficient if explained well d 6 pts Sketch the minority carrier concentration profiles in the base regions of transistors Q1 and Q2 Your values at the edges of the depletion regions x 0 the edge of the emitter base depletion region and x WB the edge of the base collector depletion region should be accurate 8 e 4 pts Find the minimum output voltage vOUT for which all the transistors operate in the forward active region vOUT MIN f 6 pts Find the small signal output resistance for this current source ROUT 9 g 4 pts Modify the schematic by adding just one extra transistor to minimize the mismatch of IOUT and IREF due to base width modulation 10 3 CMOS Amplifier 34 points VDD M6 M7 M4 vIN M1 iOUT vOUT IBIAS M5 M2 M3 VDD 5V VTn VTp 0 5V nCox 50 A V2 pCox 20 A V2 n p 0 05 V 1 IBIAS 100 A M1 W L 1 16 1 m m M2 W L 1 16 1 m m M3 W L 1 64 4 m m M4 W L 1 64 4 m m M5 W L 1 4 1 m m M6 W L 1 4 1 m m M7 W L 1 4 1 m m Cox 5fF m 2 Cov 0 5fF m per unit of transistor width Input signal has negligible output resistance Neglect backgate effect for bias and small signal calculations 11 a 4 pts Find DC currents of transistors M1 M2 M3 and M4 ID1 ID2 ID3 ID4 12 b 6 pts For RL 100 find the maximum and minimum output voltages for which all transistors operate in saturation vOUT MAX vOUT MIN c 6 pts For RL 100k find the maximum and minimum output voltages find the maximum and minimum output voltages for which all transistors operate in saturation vOUT MAX vOUT MIN 13 d 6 pts Find the low frequency small signal gain of the amplifier and its output resistance with RL Av ROUT 14 e 6 pts Find the bandwidth of this amplifier 3dB 15 f 6 pts Estimate the frequency of the second pole of this amplifier p2 16
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