UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences Costas J Spanos Problem Set 11 Due Wednesday November 11th 1998 EECS105 FALL 1998 Default values to use on this problem set VTn VTp 1 V VDD 5 V NCOX 50 A V2 PCOX 25 A V2 VGS sat 1 5 V VCE sat 2 V and VBE sat 7 V 1 Examine the circuit in Figure 1 a What is the circuit s purpose b What is the minimum vOUT that can be sustained and still have all devices operating in their constant current region 2 Check out the totem pole in Figure 2 It is decreed that W L 10 2 and IS 10 15 A You may neglect base current and backgate effect Assume all devices are operating in their constant current region a Solve for VOUT1 VOUT2 and VOUT3 b Maintaining the same VOUT1 as part a change the W L of device M2 so that V OUT2 2 4 V c How does implementing part b change the value of VOUT3 3 Take a good close look at Figure 3 MR has a device sizing of W L 10 2 Assume all devices are operating in the constant current region surprise and neglect backgate effect a Find W L 1 such that IOUT1 60 A b Find W L 2 such that IOUT2 120 A c Find W L 3 such that IOUT3 300 A Over 4 For the next stage in your education you will compare a bipolar and MOS voltage source The two sources are shown in Figure 4 IREF 100 A and the device characteristics are as follows BJT Characteristics IS 10 15 A F 0 100 VA 20 V MOS Characteristics W L 20 2 VTn 0 7 V n 0 03 V 1 a Find an expression for VOUT as a function of Iout in the bipolar case and find it s explicit value for Iout 0 This time do NOT neglect IB b Now solve for VOUT in the MOS case c Solve for the incremental source resistance in the BJT d Solve for the incremental source resistance in the MOS 5 Last but not least inspect the cascode current source in Figure 5 For the questions assume that the W L ratio of all devices is 10 and that IOUT 100 A The PMOS device characteristics are as follows VTp 0 7 V and p 0 03 V 1 Assume that all bulk connections are tied to the source a Calculate the incremental source resistance of the current source b If IOUT is required to be 20 A what is the new W L of devices M2 and M2B assuming that IREF remains at 100 A c Assuming part b is implemented what is the new incremental source resistance Notice the new Date and Time for the 2nd Midterm Friday 6 7 30pm 20th of November in Sibley For the latest news visit our web site http www inst EECS Berkeley EDU ee105 Please post your questions on our newsgroup ucb class ee105 Please return your homework in 558 Cory Hall to Cheryl Craigwell cmc eecs 642 1237 fax 642 2739 or in class by 11 10am of the due date Late homeworks will not be graded 2
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