EECS 105 Spring 2002 Lecture 38 R T Howe Lecture 38 Last time CMOS cascode transconductance amplifier design example Today BiCMOS voltage amplifier example of dissection technique for a complicated circuit Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Multi Stage Voltage Amplifier Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Cutting Through the Complexity Two Approaches 1 Eliminate background transistors to reduce clutter 2 Identify the signal path between the input and output Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe First Approach Find I V Sources Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe What s Left Voltage at base of Q2 is set by totem pole Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Second Approach Find Signal Path Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Identifying the Stages First stage or two stages CS CB cascode Second stage or two stages CD CC voltage buffer Why does this make sense for a voltage amplifier Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Find Key Two Port Parameters Output resistance of cascode Rout CS CB roc ro 2 1 g m 2 r 2 RS 2 roc Rup ro 6 1 g m 6 RS 6 Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Two Port Parameters Cont Dept of EECS University of California at Berkeley EECS 105 Spring 2002 Lecture 38 R T Howe Output Resistance and Voltage Gain Source resistance of the CC stage is the output resistance of the CD stage small Rout Rout CC RS CC 1 1 1 1 gm4 o g m 4 g m3 o g m 4 Open circuit voltage gain Av last two stages have nearly unity gain Av g m1 o ro 2 ro 6 1 g m 6 ro 7 Dept of EECS University of California at Berkeley
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