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Berkeley ELENG 105 - Lecture 19

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Lecture 19Diode-Connected MOSFETsCommon-Gate Amplifier StageOperation in Saturation RegionI/O Impedances of CG Stage (l = 0)CG Stage with Source ResistanceSlide 7CG Stage with BiasingCG Stage with Gate ResistanceCG Stage ExampleSource Follower StageSource Follower ExampleRout of Source FollowerSource Follower with BiasingSupply-Independent BiasingEE105 Fall 2007 Lecture 19, Slide 1 Prof. Liu, UC BerkeleyLecture 19OUTLINE•Common-gate stage•Source followerReading: Chapter 7.3-7.4EE105 Fall 2007 Lecture 19, Slide 2 Prof. Liu, UC BerkeleyDiode-Connected MOSFETs•Note that the small-signal model of a PMOSFET is identical to that of an NMOSFET111omXrgR 221omYrgR Diode-connected NMOSFETSmall-signal analysis circuit Small-signal analysis circuitDiode-connected PMOSFETEE105 Fall 2007 Lecture 19, Slide 3 Prof. Liu, UC BerkeleyCommon-Gate Amplifier Stage•An increase in Vin decreases VGS and hence decreases ID.The voltage drop across RD decreases  Vout increasesThe small-signal voltage gain (Av) is positive. DmvRgA EE105 Fall 2007 Lecture 19, Slide 4 Prof. Liu, UC BerkeleyOperation in Saturation Region•For M1 to operate in saturation, Vout cannot fall below Vb-VTH. Trade-off between headroom and voltage gain.EE105 Fall 2007 Lecture 19, Slide 5 Prof. Liu, UC BerkeleyI/O Impedances of CG Stage ( = 0)DoutRR mingR1Small-signal analysis circuit fordetermining output resistance, RoutSmall-signal analysis circuit fordetermining input resistance, RinEE105 Fall 2007 Lecture 19, Slide 6 Prof. Liu, UC BerkeleyCG Stage with Source ResistanceSmDvRgRA1inmSmXvgRgv1111SmDminXXoutinoutRgRgvvvvvvSmall-signal equivalent circuit seen at inputFor= 0:EE105 Fall 2007 Lecture 19, Slide 7 Prof. Liu, UC Berkeley   OSOmSSmOoutrRrgRRgrR  11•The output impedance of a CG stage with source resistance is identical to that of CS stage with degeneration.Small-signal analysis circuit fordetermining output resistance, RoutEE105 Fall 2007 Lecture 19, Slide 8 Prof. Liu, UC BerkeleyCG Stage with Biasing•R1 and R2 establish the gate bias voltage.•R3 provides a path for the bias current of M1 to flow.   DmSmminoutRgRgRgRvv/1||/1||33EE105 Fall 2007 Lecture 19, Slide 9 Prof. Liu, UC BerkeleyCG Stage with Gate Resistance•For low signal frequencies, the gate conducts no current. Gate resistance does not affect the gain or I/O impedances.EE105 Fall 2007 Lecture 19, Slide 10 Prof. Liu, UC BerkeleyCG Stage ExampleDOSmOmoutRrRgrgR ||||11211 SmmDminXXoutvRggRgvvvvA2111 Small-signal equivalent circuit seen at inputSmall-signal equivalent circuit seen at output inSmminSmmmmXvRggvRggggv212121111111121111OmSOmoutrgRrgR EE105 Fall 2007 Lecture 19, Slide 11 Prof. Liu, UC BerkeleySource Follower StageSmall-signal analysis circuit fordetermining voltage gain, Av1||1||LOmLOinoutvRrgRrvvAEquivalent circuit   LooutinmLomoutRrvvgRrvgv1outinvvv 1EE105 Fall 2007 Lecture 19, Slide 12 Prof. Liu, UC BerkeleySource Follower Example•In this example, M2 acts as a current source.21121||1||OOmOOvrrgrrAEE105 Fall 2007 Lecture 19, Slide 13 Prof. Liu, UC BerkeleyRout of Source Follower•The output impedance of a source follower is relatively low, whereas the input impedance is infinite (at low frequencies); thus, it is useful as a voltage buffer.LmLOmoutRgRrgR ||1||||1Small-signal analysis circuit fordetermining output resistance, RoutEE105 Fall 2007 Lecture 19, Slide 14 Prof. Liu, UC BerkeleySource Follower with Biasing•RG sets the gate voltage to VDD; RS sets the drain current.(Solve the quadratic equation to obtain the value of ID.) 221THSDDDoxnDVRIVLWCI Assuming  = 0:EE105 Fall 2007 Lecture 19, Slide 15 Prof. Liu, UC BerkeleySupply-Independent Biasing•If Rs is replaced by a current source, the drain current ID becomes independent of the supply voltage


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Berkeley ELENG 105 - Lecture 19

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