EECS 105 Spring 2004 Lecture 23 Lecture 23 Active linear circuits Prof J S Smith Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Context In the first half of the course we reviewed linear circuit analysis and models for the most common integrated circuit devices Resistors capacitors diodes FETs and BJT s With today s lecture we will start exploring how to use transistors to make amplifiers and other active analog circuits Department of EECS University of California Berkeley 1 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Reading For the next two lectures and for at least a week after spring break we will be covering chapter 8 in the text single stage amplifiers There is no homework assignment over spring break Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Lecture Outline z Parasitic capacitances in BJT SmallSignal Models Active Linear Circuits z Single stage amplifiers Department of EECS University of California Berkeley 2 EECS 105 Spring 2004 Lecture 23 Prof J S Smith BJT Small Signal Model ib r vbe ic g m vbe 1 vce ro Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith BJT Parasitic Capacitors z Emitter base is a forward biased junction depletion capacitance C j BE 1 4C j BE 0 z z Collector base is a reverse biased junction depletion capacitance Due to minority charge injection into base we have to account for the diffusion capacitance as well Cb F g m Department of EECS University of California Berkeley 3 EECS 105 Spring 2004 Lecture 23 Prof J S Smith BJT Cross Section Core Transistor z z z External Parasitic Core transistor is the vertical region under the emitter contact Everything else is parasitic or unwanted Lateral BJT structure is also possible Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Core BJT Model Reverse biased junction Base Collector g m v Reverse biased junction Diffusion Capacitance z z z Fictional Resistance no noise Emitter Given an ideal BJT structure we can model most of the action with the above circuit For low frequencies we can forget the capacitors Capacitors are non linear MOS gate overlap caps are linear Department of EECS University of California Berkeley 4 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Complete Small Signal Model Real Resistance has noise core BJT Reverse biased junctions External Parasitics Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Circuits z When the inventors of the bipolar transistor first got a working device the first thing they did was to build an audio amplifier to prove that the transistor was actually working Department of EECS University of California Berkeley 5 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Amplifiers We have already seen hints of what transistors can do from their small signal models z A small voltage on the gate of a FET can change its drain current z A small change in the current into the base of a BJT can change a large collector current z To make a single stage amplifier we will need to figure out how to bias it to provide the desired operating point Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith A Simple Circuit An MOS Amplifier Input signal Supply Rail RD VDD vo vs vGS VGS vs Department of EECS VGS I DS Output signal University of California Berkeley 6 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Selecting the Output Bias Point z z z The bias voltage VGS is selected so that the output is mid rail between VDD and ground For gain the transistor is biased in saturation Constraint on the DC drain current IR z VDD Vo VDD VDS RD RD All the resistor current flows into transistor I R I DS sat z Must ensure that this gives a self consistent solution transistor is biased in saturation VDS VGS VT Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Finding the Input Bias Voltage z Ignoring the output impedance I DS sat z W 1 nCox VGS VTn 2 L 2 Typical numbers W 40 m L 2 m RD 25k nCox 100 A V2 VTn 1 V VDD 5 V I RD VDD W 1 I DS sat n Cox VGS VTn 2 2 RD L 2 5V A 1 100 A 20 100 2 VGS 1 2 50k V 2 1 VGS 1 2 Department of EECS VGS 1 32 VGS VT 32 VDS 2 5 9 University of California Berkeley 7 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Applying the Small Signal Voltage Approach 1 Just use vGS in the equation for the total drain current iD and find vo vGS VGS vs vs v s cos t vO VDD RD iDS VDD RD nCox W 1 VGS vs VT 2 L 2 Note Neglecting charge storage effects Ignoring device output impedance Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Solving for the Output Voltage vO vO VDD RD iDS VDD RD nCox vO VDD RD iDS W 1 VGS vs VT 2 L 2 vs W 1 VGS VT 2 1 VDD RD nCox L 2 VGS VT 2 I DS vs vO VDD RD I DS 1 VGS VT 2 VDD 2 Department of EECS University of California Berkeley 8 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Small Signal Case z z Linearize the output voltage for the s s case Expand 1 x 2 1 2x x2 last term can be dropped when x 1 2 vs 2v s vs 2 1 1 V G S V Tn V GS V Tn V V GS Tn Neglect 2vs vO VDD RD I DS 1 VGS VT Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith Linearized Output Voltage For this case the total output voltage is vO VDD vO VDD 2 2vs 1 VGS VT vV VDD s DD 2 VGS VT DC Small signal output The small signal output voltage vo vsVDD Av vs VGS VT Voltage gain Department of EECS University of California Berkeley 9 EECS 105 Spring 2004 Lecture 23 Prof J S Smith Plot of Output Waveform Gain Numbers VDD VGS VT 5 0 32 16 output input mV Department of EECS University of California Berkeley EECS 105 Spring 2004 Lecture 23 Prof J S Smith There is a Better Way z z z z z What s missing didn t include device output impedance or charge storage effects must solve non linear differential equations Approach 2 Do problem in two steps DC voltages and currents ignore small signals sources set bias point of the MOSFET we had to do this to pick VGS already Substitute the …
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