Discussion Notes: Voltage Sources and Current Sources Analog integrated circuits typically consist of various sub-blocks connected to one another. These sub-blocks, which are generally amplifiers, use current sources to bias the transistors in such a way that we achieve the desired affect of the amplifier (e.g. desired voltage gain, current gain, etc.) . As we will discuss below transistors are used to generate these bias currents. Therefore, we need to set the gate voltage of the transistors in such a way that we get the desired bias current. A DC voltage is needed for this. Again we use transistors to generate the DC voltage. Voltage Sources: Therefore, as long as Vgs >= Vth the transistor is saturated and we can apply the saturation equation. )1()(21)(2VdsLWCoxIrefVthVgsλµ+=−, if we neglect channel length modulation, which we typically do in our first order analysis of ee105, we find that VthVdsatVgsVthLWCoxIrefVgs+=+=)(**2µ With all of the parameters in the above Vgs equation constant, Vgs acts as a DC voltage source. In this circuit M1 acts as a DC voltage source. Basically, Iref forces a current through M1. The other end of M1’s gate is connected to the gate of another transistor (not show). In a first order analysis, we assume no current can flow through the gate of a transistor. Therefore, all of Iref flows through the drain of M1. Furthermore, we know that M1 must be either in saturation or in cutoff. Why? Return to the current equations of an NMOS transistor. Namely, for saturation we need VthVgsVdsVthVgs≥≤− Since the gate of M1 is tied to the same potential as the drain of M1 the first equation always holds.Current Sources: Now that we have generated a DC voltage source we can use this to set the gate voltage of another transistor M2 and use M2 as an ideal current source. How is this possible? Recall, an ideal current source is a circuit element whose current through it is independent of the voltage across it. A MOSFET operating in saturation comes close to realizing this element. If we return to the saturation equation, )1()(212)(2VdsLWCoxIVthVgsλµ+=− Vgs is the DC reference voltage that we just generated and Vds is the voltage across the transistor. As previously mentioned, for a first order analysis we typically ignore the Vdsλterm. Therefore, with this assumption a transistor operating in saturation is independent of Vds and acts like an ideal current source. Although this isn’t completely true, it is close enough for ee105. Pictorially, we have generated the following. Setting the value of Iout is straightforward and is done as follows, )1()(212)(222VdsLWCoxIoutIVthVgsλµ+==− 2)^21)11(*2)((21~)(21~22222)(VthVthCoxLWIrefLWCoxIoutLWCoxIoutVthVgs−+−µµµ But since, quantities such as mobility, oxide thickness, threshold voltage, etc. are constant throughout a technology (neglecting process variations) we find Iout ===Î11*22LWIrefLWIout = and we have derived a nearly ideal current source that is a geometric ratio of the current source transistor and the voltage source transistor times the reference current. Comments on Iref: At this point you may be wondering why we don’t just use Iref to bias our amplifier. It turns out that we will need several different current values throughout our circuit and Iref is itself a rather complex circuit. The current (Iref) needs to be exact (i.e. independent of temperature variation, process variation, etc.). You will learn how to build one of these circuits if you continue on to ee140 and ee240, but for know just realize that is not feasible to have multiple Irefs and thus we must use the previous analysis to generate our bias currents. Example: To solidify the concepts just discussed consider the following circuit. We are interested in finding the (W/L) ratios of M1, M2, and M5 such that Iout1=40uA, Iout2=100uA, and Iout3=250uA given that (W/L)r = (W/L)4 = (10/2) Solution: First we notice that Mr and M4 are voltage sources, while M1, M2, and M5 are current sources. Step 1: Solve for the dimensions of the transistors (W1/L1), (W2/L2), and (W5/L5))210()210(*10010022*222*2222)210(*1004011*111*111===→====→=uAuALWLrWrIrefIoutLWIrWrIrefLWIoutanduAuALWLrWrIrefIoutLWIrWrIrefLWIout What we notice here is Iout1 acts as a kind of new Iref that will set Vref2, or the gate voltage of M5. Therefore, 25.31)210(*402505544*1355441*553===→=uAuALWLWIoutIoutLWLWIoutLWIout If we were not given that all the transistors are in saturation, we would need to check this assumption or else are equations would not hold and our above analysis would be wrong. Assume the following : There is a .1V drop across Iref VVtnVVtpVVddVuACoxVuACoxnp5.5.5.22^/502^/25=−====µµ Step #2: Solve for the reference voltages to make sure our assumption of all devices in saturation is correct. For the PMOS voltage source Mr VgrVr= But we have a relationship for Vsgr given by,||*)(*2||*)(*2||*)(*22|)^|)((21VtpCoxLrWrIrefVgrVddVtpCoxLrWrIrefVgrVsrVtpCoxLrWrIrefVsgrVtpVsgLrWrCoxIrefr+=−+=−+=−=µµµµ Therefore, Vr = Vgr is VVtpCoxLrWrIrefVddVr 27.1||**2=−−=µ For the NMOS voltage source M4 VVgsVrefThusVtnCoxLWIoutVsVgbutVgVrefandVtnCoxLWIoutVgsnn07.144,0*441*24442*441*24==−+=−=+=µµ Know we can check that Mr, M1, and M4 are saturated For Mr and M4 we simply need to check the condition |Vgs| >= |Vt| since the gate and drain are at the same potential. For Mr, |Vgs| = |1.27 – Vdd| = |1.27 – 2.5| = 1.23V > |-.5V| so Mr is saturated For M4, |Vgs| = 1.07V > .5V so M4 is saturatedFor M1 we must check the condition that |Vgs| - |Vtp| >= |Vds| and |Vgs| >= |Vtp| Thus, |Vgs| = |Vr – Vdd| = |1.27 – 2.5V| = 1.23V |Vds| = |Vref2 – Vdd| = |1.07 – 2.5| = 1.43V So 1.23V > .5V and 1.23V - .5V <= 1.43V so M1 is saturated. For M5 and M2 we would need to know there drain voltages, which depend on the amplifiers they are connected to. So we don’t have enough
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