EECS 105 Fall 2003 Lecture 18 Lecture 18 Bipolar Single Stage Amplifiers Prof Niknejad Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Lecture Outline BJT Amps BJT Biasing Common Emitter Amp Common Base Amp Common Collector Amp Department of EECS AKA Emitter Follower Multiplier Concept Emitter Degeneration University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Bipolar Amplifiers Common emitter amplifier Biasing adjust VBIAS VBE so that IC ISUP Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Small Signal Two Port Model Parameters IC 1 mA 100 VA 3V b 25mV Rin rp 100 2 5kW gm 1mA 3V Rout ro roc roc 3k roc 3k 1mA 1mA 1 Gm g m S 40mS 25mV 25 Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Base Amplifier To find IBIAS note that IBIAS IE 1 F IC Common base current gain Ai F Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad CB Input Resistance Summing currents at the input node small 1 it g m vt rp vp it g m vp vo vt g o 0 rp 1 1 g m 1 vt 1 25mV Rin g m g m 25W it rp 1mA gm b Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad CB Output Resistance put roc back in after finding vt it note polarity Same topology as CG amplifier but with r RS rather than RS Rout roc ro 1 g m rp RS RS rp Rout roc ro 1 g m rp Rout roc ro 1 b Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Output Impedance Details First draw small signal equivalent circuit with transistor and simplify as much as possible Then if needed add the small signal equivalent circuit If frequency is low get rid of caps Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Output Impedance Calculation it rp vp g m vp ro vt RS vt vp it g m vp ro vp it RS rp vt RS rp it g mit RS rp it ro ro RS rp vt it 1 g m RS rp ro ro Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Base Two Port Model Why did we consider it a current amp Current Amp Unity Current Gain 1 Small Input Impedance Large huge Output Impedance Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Amplifier DC Bias output is one VBE drop down from input Emitter Follower Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Input Resistance vt it rp b 1 it RL ro roc Rin rp b 1 RL ro roc Rin rp b 1 RL Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Output Resistance Divider between vt and v vp rp vt rp RS it g m vp vp rp 1 vt ro roc 1 0 1 p it vt g m r Department of EECS rp 1 v r r t o oc rp RS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Output Res cont 1 p it vt g m r rp 1 v r r t o oc r R S p 1 it vt g m rp 1 r R S p vt rp RS R out it b 1 Looking into base of emitter follower load impedance larger by factor 1 Looking into emitter of follower source impedance smaller by factor 1 Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Voltage Gain KCL at the output node note v vt vout vout roc ro g m rp 1 vt vout vout roc ro vout roc ro Department of EECS 1 1 1 g m vp vp rp 1 g m rp 1 g m rp 1 vt vout vt University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Common Collector Two Port Model typo RL Voltage Amp Unity Voltage Gain 1 Large Input Impedance Small Output Impedance Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Summary of Two Port Parameters Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Typical Discrete Biasing VCC RC R1 R2 A good biasing scheme must be relatively insensitive to transistor parameters vary with process and temperature In this scheme the base current is given by VB VCC RE R1 R1 R2 The emitter current R1 I E VCC VBE on RE R1 R2 Department of EECS University of California Berkeley EECS 105 Fall 2003 Lecture 18 Prof A Niknejad Gain for Discrete Design Rin b 1 rp RE b 1 RE vs RC R1 vs RC RE R2 vs RE vs RE Rin 2 b 1 RE R1 R2 Let s derive it by intuition Input impedance can be made large enough by design Device acts like follower emitter base This signal generates a collector current Can be made large to couple All of source to input even with RS Department of EECS University of California Berkeley
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