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Berkeley ELENG 105 - Lecture Notes

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Lecture 7ANNOUNCEMENTS•MIDTERM #1 will be held in class on Thursday October 11•MIDTERM #1 will be held in class on Thursday, October 11– Review session will be held on Friday, October 5• MIDTERM #2 will be held in class on Tuesday, November 13OUTLINE• BJT Amplifiers (cont’d)– Biasing–Amplifier topologiesAmplifier topologies– Common‐emitter topologyReading: Chapter 512‐531EE105 Fall 2007 Lecture 7, Slide 1Prof. Liu, UC BerkeleyReading: Chapter 5.1.2‐5.3.1Biasing of BJT• Transistors must be biased because 1They must operate in the active region and1.They must operate in the active region, and2. Their small‐signal model parameters are set by the bias conditions.EE105 Fall 2007 Lecture 7, Slide 2Prof. Liu, UC BerkeleyDC Analysis vs. Small‐Signal Analysis• Firstly, DC analysis is performed to determine the DC operating point and to obtain the small‐signal modeloperating point and to obtain the smallsignal model parameters.• Secondly, independent sources are set to zero and the small‐signal model is used.EE105 Fall 2007 Lecture 7, Slide 3Prof. Liu, UC BerkeleySimplified Notation• Hereafter, the voltage source that supplies power to the circuit is replaced by a horizontal bar labeledVCCthe circuit is replaced by a horizontal bar labeled VCC, and input signal is simplified as one node labeled vin. EE105 Fall 2007 Lecture 7, Slide 4Prof. Liu, UC BerkeleyExample of Bad Biasing• The microphone is connected to the amplifier in an at tempt to amplify the small output signal of the microphone.to amplify the small output signal of the microphone. • Unfortunately, there is no DC bias current running through the transistor to set the transconductance.EE105 Fall 2007 Lecture 7, Slide 5Prof. Liu, UC BerkeleyAnother Example of Bad Biasing• The base of the amplifier is connected to VCC, tr ying to establish a DC bias.to establish a DC bias. • Unfortunately, the output signal produced by the microphone is shorted to the power supply.EE105 Fall 2007 Lecture 7, Slide 6Prof. Liu, UC BerkeleyBiasing with Base Resistor• Assuming a constant value for VBE, one can solve for bothIBandICand determine the terminal voltages ofboth IB and ICand determine the terminal voltages of the transistor.• However, the bias point is sensitive to βvariations.βEE105 Fall 2007 Lecture 7, Slide 7Prof. Liu, UC BerkeleyImproved Biasing: Resistive Divider• Using a resistive divider to set VBE, it is possible to produce an ICthat is relatively insensitive to pC yvariations in β, if the base current is small.EE105 Fall 2007 Lecture 7, Slide 8Prof. Liu, UC BerkeleyAccounting for Base Current• With a proper ratio of R1to R2, ICcan be relatively insensitive to β. Howe ver, its exponential dependence β, p pon R1// R2makes it less useful.EE105 Fall 2007 Lecture 7, Slide 9Prof. Liu, UC BerkeleyEmitter Degeneration Biasing• RE helps to absorb the change in VXso that VBEstays relatively constant.y• This bias technique is less sensitive to β(if I1 >> IB) and VBE variations.EE105 Fall 2007 Lecture 7, Slide 10 Prof. Liu, UC BerkeleyBias Circuit Design Procedure1. Choose a value of IC to provide the desired small‐signal model parameters:gretcsignal model parameters: gm, rπ, etc.2Considering the variations inRRandVchoose2.Considering the variations in R1, R2, and VBE, choose a value for VRE.3. With VRE chosen, and VBE calculated, Vxcan be determined.4. Select R1 and R2 to provide Vx.EE105 Fall 2007 Lecture 7, Slide 11 Prof. Liu, UC BerkeleySelf‐Biasing Technique• This bias technique utilizes the collector voltage to provide the necessary Vxand IB.p yx B• One important characteristic of this approach is that the collector has a higher potential than the base, hd f hthus guaranteeing active‐mode operation of the BJT.EE105 Fall 2007 Lecture 7, Slide 12 Prof. Liu, UC BerkeleySelf‐Biasing Design GuidelinesBRR>>(1)CVVVR∆>>2)( (1)βBECCBEVVV−<<∆ 2)((1) provides insensitivity to β.(2) provides insensitivity to variation in VBE .EE105 Fall 2007 Lecture 7, Slide 13 Prof. Liu, UC BerkeleySummary of Biasing Techniques EE105 Fall 2007 Lecture 7, Slide 14 Prof. Liu, UC BerkeleyPNP BJT Biasing Techniques• The same principles that apply to NPN BJT biasing also apply to PNP BJT biasing with only voltage andalso apply to PNP BJT biasing, with only voltage and current polarity modifications.EE105 Fall 2007 Lecture 7, Slide 15 Prof. Liu, UC BerkeleyPossible BJT Amplifier Topologies• There are 3 possible ways to apply an input to an amplifier and 3 possible ways to sense its output.amplifier and 3 possible ways to sense its output.• In practice, only 3 out of the possible 6 input/output combinations are useful.EE105 Fall 2007 Lecture 7, Slide 16 Prof. Liu, UC BerkeleyCommon‐Emitter (CE) TopologyEE105 Fall 2007 Lecture 7, Slide 17 Prof. Liu, UC BerkeleySmall Signal of CE AmplifierinoutvvvA ≡EE105 Fall 2007 Lecture 7, Slide 18 Prof. Liu, UC BerkeleyLimitation on CE Voltage Gain • Since gm= IC/VT, the CE voltage gain can be written as a function of VRC, where VRC= VCC‐ VCE.RC,RC CCCE• VCE should be larger than VBEfor the BJT to be operating in active mode.VRITRCTCCvVVVRIA==EE105 Fall 2007 Lecture 7, Slide 19 Prof. Liu, UC BerkeleyVoltage‐Gain / Headroom TradeoffEE105 Fall 2007 Lecture 7, Slide 20 Prof. Liu, UC BerkeleyI/O Impedances of CE Stage• When measuring output impedance, the input port has to be grounded so thatv= 0has to be grounded so that vin = 0.πrivRXXin==CXXoutRivR ==EE105 Fall 2007 Lecture 7, Slide 21 Prof. Liu, UC BerkeleyCE Stage Design Trade‐offsEE105 Fall 2007 Lecture 7, Slide 22 Prof. Liu, UC BerkeleyInclusion of the Early Effect• The Early eff ect results in reduced voltage gain of the CE amplifierCE amplifier. OCOCmvrRRrRgA||)||(=−=EE105 Fall 2007 Lecture 7, Slide 23 Prof. Liu, UC BerkeleyOCoutrRR||Intrinsic Gain• As RCgoes to infinity, the voltage gain approaches its maximum possible valueg×rwhich is ref erred tomaximum possible value, gm×rO, which is ref erred to as the intrinsic gain. •The intrinsic gain is independent of the bias current:•The intrinsic gain is independent of the bias current:OmvrgA−=AvOmvVAg=TvVEE105 Fall 2007 Lecture 7, Slide 24 Prof. Liu, UC BerkeleyCurrent Gain, AI• The current gain is defined as the ratio of current delivered to the load to current flowing into the inputdelivered to the load to current flowing into the input.• For a CE stage, it is equal to β.iA=inoutIiiAβ=CEIAEE105


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Berkeley ELENG 105 - Lecture Notes

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