EE105 - Spring 2007Microelectronic Devices and CircuitsLecture 11Bipolar Amplifiers (Part 1)2Chapter 5 Bipolar Amplifiers 5.1 General Considerations 5.2 Operating Point Analysis and Design 5.3 Bipolar Amplifier Topologies 5.4 Summary and Additional Examples3Bipolar Amplifiers4Voltage Amplifier In an ideal voltage amplifier, the input impedance is infinite and the output impedance zero. But in reality, input or output impedances depart from their ideal values.5Input/Output Impedances The figure above shows the techniques of measuring input and output impedances.xxxVRi=6Input Impedance Example I When calculating input/output impedance, small-signal analysis is assumed. πrivxx=7Impedance at a Node When calculating I/O impedances at a port, we usually ground one terminal while applying the test source to the other terminal of interest.8Impedance at Collector With Early effect, the impedance seen at the collector is equal to the intrinsic output impedance of the transistor (if emitter is grounded).out oRr=9Impedance at Emitter The impedance seen at the emitter of a transistor is approximately equal to one over its transconductance (if the base is grounded).111()xxmoutmAvigrRgVπ=+≈=∞10Three Master Rules of Transistor Impedances Rule # 1: looking into the base, the impedance is rπif emitter is (ac) grounded. Rule # 2: looking into the collector, the impedance is roif emitter is (ac) grounded. Rule # 3: looking into the emitter, the impedance is 1/gmif base is (ac) grounded and Early effect is neglected. 11Biasing of BJT Transistors and circuits must be biased because (1) transistors must operate in the active region, (2) their small-signal parameters depend on the bias conditions.12DC Analysis vs. Small-Signal Analysis First, DC analysis is performed to determine operating point and obtain small-signal parameters. Second, sources are set to zero and small-signal model is used.13Notation Simplification Hereafter, the battery that supplies power to the circuit is replaced by a horizontal bar labeled Vcc, and input signal is simplified as one node called Vin. 14Example of Bad Biasing The microphone is connected to the amplifier in an attempt to amplify the small output signal of the microphone. Unfortunately, there’s no DC bias current running through the transistor to set the transconductance.15Another Example of Bad Biasing The base of the amplifier is connected to Vcc, trying to establish a DC bias. Unfortunately, the output signal produced by the microphone is shorted to the power supply.16Biasing with Base Resistor Assuming a constant value for VBE, one can solve for both IBand ICand determine the terminal voltages of the transistor. However, bias point is sensitive to β variations.CC BEBBCC BECBVVIRVVIRβ−=⎛⎞−=⎜⎟⎝⎠17Improved Biasing: Resistive Divider Using resistor divider to set VBE, it is possible to produce an ICthat is relatively independent of β if base current is small.212212exp( )XCCCCCSTRVVRRVRIIRRV=+=+18Accounting for Base Current With proper ratio of R1and R2, ICcan be insensitive to β; however, its exponential dependence on resistor deviations makes it less useful.expThev B ThevCSTVIRIIV⎛⎞−=⎜⎟⎝⎠19Emitter Degeneration Biasing The presence of REhelps to absorb the error in VXso VBEstays relatively constant. This bias technique is less sensitive to β (I1>> IB) and VBEvariations.20Design Procedure Choose an ICto provide the necessary small signal parameters, gm, rπ, etc. Considering the variations of R1, R2, and VBE, choose a value for VRE. With VREchosen, and VBEcalculated, Vxcan be determined. Select R1and R2to provide Vx21Self-Biasing Technique This bias technique utilizes the collector voltage to provide the necessary Vxand IB. One important characteristic of this technique is that collector has a higher potential than the base, thus guaranteeing active operation of the transistor.22Self-Biasing Design Guidelines(1) provides insensitivity to β .(2) provides insensitivity to variation in VBE .(1) (2) BCBECCBERRVVVβ>>Δ<<−23Summary of Biasing Techniques 24PNP Biasing Techniques Same principles that apply to NPN biasing also apply to PNP biasing with only polarity modifications.25Possible Bipolar Amplifier Topologies Three possible ways to apply an input to an amplifier and three possible ways to sense its output. However, in reality only three of six input/output combinations are useful.26Study of Common-Emitter Topology Analysis of CE Core – Inclusion of Early Effect Emitter Degeneration– Inclusion of Early Effect CE Stage with Biasing27Common-Emitter Topology28Small Signal of CE AmplifieroutvinoutmminCvmCvAvvgv gvRAgRπ=−= ==−29Limitation on CE Voltage Gain Since gmcan be written as IC/VT, the CE voltage gain can be written as the ratio of VRCand VT. VRCis the potential difference between VCCand VCE, and VCEcannot go below VBEin order for the transistor to be in active region. CCvTRCvTCC BEvTIRAVVAVVVAV==−<30Tradeoff between Voltage Gain and Headroom31I/O Impedances of CE Stage When measuring output impedance, the input port has to be grounded so that Vin= 0.XinXvRriπ==CXXoutRivR ==32CE Stage Trade-offs33Inclusion of Early Effect Early effect will lower the gain of the CE amplifier, as it appears in parallel with RC. (||)||vmCOout C OAgRrRRr=−=34Intrinsic Gain As RCgoes to infinity, the voltage gain reaches the product of gmand rO, which represents the maximum voltage gain the amplifier can have. The intrinsic gain is independent of the bias current.vmOAvTAgrVAV=−=35Current Gain Another parameter of the amplifier is the current gain, which is defined as the ratio of current delivered to the load to the current flowing into the input. For a CE stage, it is equal to β.outIinICEiAiAβ==36Emitter Degeneration By inserting a resistor in series with the emitter, we “degenerate”the CE stage. This topology will decrease the gain of the amplifier but improve other aspects, such as linearity, and input impedance.37Small-Signal Model Interestingly, this gain is equal to the total load resistance to ground divided by 1/gmplus the total resistance placed in series with the emitter. 11mCvmECvEmgRAgRRARg=−+=−+38Emitter Degeneration Example I The input impedance of Q2can be combined in parallel with REto yield an equivalent
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