Name 1 point AMIN SID UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences B E BOSER Midterm 1 September 28 2004 EECS 105 FALL 2004 Show derivations and mark results with box around them Erase or cross out erroneous attempts Simplify algebraic results as much as possible Mark your name and SID at the top of the exam and all extra sheets For Office Use Only Points Problem 1 Problem 2 Problem 3 Problem 4 TOTAL 25 25 24 25 100 1 Problem 1 25 points Sheet resistance 2 Shown below is the layout of a p type resistor with NA 1017 cm 3 p 250 cm and Vs thickness t 1 m Electronic charge q 1 6 10 19 C s s V1 V2 a 10 pts Calculate the sheet resistance Rsh in b 10 pts Assuming Rsh 1k not the correct answer for part a calculate the resistance between terminals V1 and V2 for s 1 m c 5 pts Repeat part b with s 2 m ANSWERS Rsh a 1 1 1 19 17 3 q p p t q N A p t 1 6 x10 C 10 cm 250 cm 2 Rsh 2500 Vs 10 4 cm square b The number of squares in the segment marked by red is squares in the segment marked by green is equals 5 3 8 As a result 5s 5 The number of 1s 9s 3 Hence the total number of squares 3s R Rsh number of squares 1 k square 8 squares 8k c From part b the value of s does not enter into the expression for R Hence the value for R is unaffected from part b and is equal to 8k 2 Problem 2 25 points Carrier transport In this problem you are to design an over current protection device Assume that the slab of silicon shown below is doped with an acceptor concentration of Na with Na ni 2 N a 1016 cm 3 p 250 cm v 10 6 cm s t 10 m W 50 m Vs sat p L 100 m electronic charge q 1 6 10 19 C L t V W a 15 pts Derive an analytical expression and calculate the numerical value for the maximum current Imax b 10 pts Derive an analytical expression and calculate the numerical value for Vc see the I V curve below for the definition of Vc I Imax 0 Vc V 3 ANSWERS a I max q p v sat p A q N a v sat p W t I max 1 6 x10 19 C 1016 cm 3 10 6 cm 50 x10 4 cm 10 x10 4 cm 8mA s v sat p p Ec p b v sat p L Vc Vc p L 10 6 cm 100 x10 4 cm s Vc 40V 2 250 cm Vs 4 Problem 3 24 points Region of operation Shown below are both NMOS and PMOS transistors with various terminal voltages referred to ground Identify the source terminal V1 or V2 and the region of operation cutoff or triode of each transistor by circling the correct answer in the table provided NMOS VT0n 1 V 1 2 n 1V p 0 5 V 2 V 2 V VTn VT 0 n n VTp VT 0 p p Example PMOS VT0p 1 V 1 2 p 1 V n 0 5 V p n BS SB a V1 2 V 2 p 2 n V2 0 V b c V1 3 V V1 5 V V4 0 V V3 0 5 V V1 5 V V4 5 V V3 0 V V2 0 V V2 0 V e f V1 3 1 V V1 5 V V4 0 V V1 102 V V4 13 V V3 0 V V2 3 V V3 104 V V2 4 V Circuit V4 5 V V3 5 V V2 2 V d V3 4 5 V V4 0 V V3 4 V Source Terminal V4 100 V V2 100 V Region Example V1 V2 Cutoff Triode a V1 V2 Cutoff Triode b V1 V2 Cutoff Triode c V1 V2 Cutoff Triode d V1 V2 Cutoff Triode e V1 V2 Cutoff Triode f V1 V2 Cutoff Triode 5 ANSWERS a V2 is the source terminal Also VTn VTn 0 1V because the source V2 and bulk V4 are at the same potential The NMOS transistor is cutoff because VGS V3 V2 0 5V 0V 0 5V VTn 1V b V1 is the source terminal Also VTp VTp 0 1V because the source V1 and bulk V4 are at the same potential The PMOS transistor is in triode because VSG V1 V3 5V 0V 5V VTp 1V and VSD V1 V2 5V 2V 3V VSG VTp V1 V3 VTp 5V 0V 1V 4V c V1 is the source terminal Also VTp VTp 0 1V because the source V1 and bulk V4 are at the same potential The PMOS transistor is cutoff because VSG V1 V3 5V 5V 0V VTp 1V d V2 is the source terminal Also V4 is the bulk terminal As a result VTn VTn 0 n 2 p VBS 2 p VTn 0 n 2 p V4 V2 2 p VTn 1V 1 V 1V 3V 1V 2V The NMOS transistor is cutoff because VGS V3 V2 4 5V 3V 1 5V VTn 2V e V1 is the source terminal Also V4 is the bulk terminal As a result VTp VTp 0 p 2 n VSB 2 n VTp 0 p 2 n V1 V4 2 n VTp 1V 1 V 1V 8V 1V 3V The PMOS transistor is in triode because VSG V1 V3 5V 0V 5V VTp 3V and VSD V1 V2 5V 4V 1V VSG VTp V1 V3 VTp 5V 0V 3V 2V 6 f V2 is the source terminal Also VTn VTn 0 1V because the source V2 and bulk V4 are at the same potential The NMOS transistor is in triode because VGS V3 V2 104V 100V 4V VTn 1V and VDS V1 V2 102V 100V 2V VGS VTn V3 V2 VTn 104V 100V 1V 3V 7 Problem 4 25 points CMOS switch For this problem ignore the backgate effect that is let n p 0 5V NMOS VT0n 1 V nCox 200 A V2 PMOS VT0p 1 V pCox 100 A V2 Ln 4 m Wn m Vi Vo Lp 4 m 0V Wp m Figure 1 CMOS switch for part a a 15 pts Find Wn and Wp such that Rio 1 k for both Vi Vo 0 V and Vi Vo 5 V see Figure 1 above Rio is the resistance between the input and output terminals Vi and Vo b 10 pts Now let Wn 10 m and Wp 40 m see Figure 2 below NOTE these are not the answers you found for part a Calculate Rio for Vi Vo 2 V 5V Ln 4 m Wn 10 m Vi Vo Lp 4 m 0V Wp 40 m Figure 2 CMOS switch for part b 8 ANSWERS For VDS 0 R NMOS 1 W n C ox n VGS …
View Full Document
Unlocking...