20 Transistor Amplifiers Perspective look at the various configurations of bipolar and MOS transistors for which a small signal voltage or current is transformed e g usually amplified increased in magnitude between the input and output ports Amplifier terminology Input sources Intrinsic Amplifier V Load Voltage Input Supply Current ISUP RS vs VBIAS vIN VBIAS vs Current Input is iOUT id ISUP RS iIN IBIAS is iD Input Active Device iD f input vOUT RL IBIAS V Abstractions Sources include precisely adjusted bias voltages or currents Source resistance is associated with the small signal source and neglected for bias calculations Load resistance typically models another amplifier speaker actuator etc EECS 105 Fall 1998 Lecture 20 Amplifier Biasing Input bias voltage VIN sets the DC device current ID to precisely equal the supply current ISUP note D device here Likewise if the input is the sum of small signal and DC current the input bias current IBIAS is chosen so that it sets ID ISUP sources then The DC output current is IOUT ID ISUP 0 A which implies that the DC output voltage VOUT 0 V also Note both positive and negative DC supply voltages are used so VOUT 0 V does not mean that the DC voltage drop is zero KEY IDEA the small signal voltage or current source perturbs the amplifier bias through iD f input which results in a small signal output current iOUT iD iSUP ID id ISUP id since the supply current is DC iSUP ISUP A small signal output voltage is generated vout RL iout where RL is the load resistor EECS 105 Fall 1998 Lecture 20 Two Port Amplifier Models How do we characterize an amplifier s response to a general input signal Th venin or Norton source the controlled source is determined by output signal voltage or current we select which is of interest and by the input signal Therefore there are FOUR types of amplifiers Voltage Current Transconductance voltage in current out Transresistance current in voltage out From network theory any linear two port network can be represented by yij zij hij gij our amplifier models are closely related to these formal two port equivalent circuits but they have intuitively based elements that can depend on RL or RS only numerically significant elements no reverse transmission from output to input is included in any of our models We need methods to find the key parameters for all four models Rin Input Resistance Av Voltage Gain Gm Tranconductance Rout Output Resistance Ai Current Gain Rm Transresistance EECS 105 Fall 1998 Lecture 20 Two Port Small Signal Amplifiers RS vs Rout vin Rin Avvin vout RL a iin is iout RS Aiiin Rin Rout RL b iout RS vs vin Gmvin Rin RL Rout c iin is RS Rout Rin Rmiin RL vout d EECS 105 Fall 1998 Lecture 20 Input Resistance Rin Define systematic procedures to find the two port parameters Key idea leave the load resistance RL attached when finding Rin Apply a small signal test source voltage source or current source and compute using KVL KCL or inspection the resulting current or voltage vt R in it v t it Two Port Amplifier r oc RL it vt EECS 105 Fall 1998 Lecture 20 Output Resistance Rout Remove RL leave the source resistance attached when finding Rout vt RS it roc Two Port Amplifier it v t vt R out it EECS 105 Fall 1998 Lecture 20 Voltage Gain Av and Current Gain Ai Voltage gain open circuit the output port RL infinity and short the source resistance RS 0 to find the unloaded voltage gain Av vin vout Two Port Amplifier v out A v v in R S 0 R L Current gain short circuit the output port RL 0 and open circuit the source resistance RS infinity to find the short circuit current gain Ai iout iin Two Port Amplifier i out A v i in roc RS RL 0 EECS 105 Fall 1998 Lecture 20 Transresistance Rm and Transconductance Gm Open circuit the source resistance RS infinity and open circuit the output port RL infinity to find the transresistance Rm iin Two Port Amplifier roc vout v out R m i in R S RL Short circuit the input resistance RS 0 and short circuit the output port RL 0 to find the transconductance Gm iout vin Two Port Amplifier i out G m v in R S 0 R L 0 EECS 105 Fall 1998 Lecture 20 Common Emitter CE Amplifier 1 Bias amplifier in high gain region 2 Determine two port model parameters VCC VCC RC RS vs VBIAS VOUT VOUT vout VOUT RL VBIAS a RC iOUT IOUT iout b Note that the source resistor RS and the load resistor RL are disconnected for determining the bias point EECS 105 Fall 1998 Lecture 20 Biasing the CE Amplifier Graphical approach plot IC as a function of the DC base emitter voltage VBIAS note normally plot vs base current so we must return to Ebers Moll V BE V th V BIAS V th IC IS e IS e forward active Load line for RC 10 k range of variation for VBIAS is only 600 mV 660 mV IC mA 0 66 1 0 VBIAS V 0 5 4 0 64 3 0 62 2 0 6 1 0 1 2 3 4 VCE VOUT V 5 a VOUT HighGain Region 5V 1 2 3 4 0 62 V VBIAS b EECS 105 Fall 1998 Lecture 20 Transfer Curve The load line was plotted assuming that VCC 5 V and that the collector resistor RC 10 k with the equation 1 I C V CC V OUT R C The transfer curve is defined by intersections between the load line IC VOUT and the family of collector current characteristics IC VBIAS VOUT Where to operate Maximize potential swing in vOUT by placing VOUT halfway between cutoff and saturation 5 V 0 2 V 2 2 5 V approx Solve for the input bias voltage IS 10 15 A V CC V OUT V CC I C 0 25 mA RC 2R C I C 250 A V BIAS V th ln 26 mV ln 682 mV 15 IS A 10 The operating point is defined by Q VBE 0 682 V VCE 2 5 V IC 250 A EECS 105 Fall 1998 Lecture 20 Small Signal Model of CE Amplifier The small signal model is evaluated at Q we assume that the current gain is o 100 and the Early voltage is VAn 25 V gm IC Vth 10 mS at room temperature r o gm 10 k ro VAn IC 100 k Substitute small signal model for BJT VCC and VBIAS are short circuited for small signals iout v r gmv ro vout RC a iout RS vs v r gmv ro RC RL vout b EECS 105 Fall 1998 Lecture 20
View Full Document
Unlocking...