Chapter 11 Frequency Response EE105 Spring 2007 Microelectronic Devices and Circuits Lecture 9 Frequency Response 11 1 11 2 11 3 11 4 11 5 11 6 11 7 General Considerations High Frequency Models of Transistors Frequency Response of CS Stages Frequency Response of CG Stages Frequency Response of Followers Frequency Response of Cascode Stage Frequency Response of Differential Pairs 2 High Frequency Roll off of Amplifier Gain Roll off Thru CL 1 g mVin RD Vout CL s The capacitive load CL is the culprit for gain roll off since at high frequency it will steal away some signal current and shunt it to ground As frequency of operation increases the gain of amplifier decreases This chapter analyzes this problem 3 4 Frequency Response of the CS Stage Vout Vin Example Figure of Merit g m RD F O M RD2 CL2 2 1 At low frequency the capacitor is effectively open and the gain is flat As frequency increases the capacitor tends to a short and the gain starts to decrease A special frequency is 1 RDCL where the gain drops by 3dB 5 Bode Plot 1 VT VCC CL This metric quantifies a circuit s gain bandwidth and power dissipation In the bipolar case low temperature supply and load capacitance mark a superior figure of merit 6 Example Bode Plot s s 1 1 L z1 z2 H s A0 s s 1 1 L p 1 p 2 p1 When we hit a zero zj the Bode magnitude rises with a slope of 20dB dec When we hit a pole pj the Bode magnitude falls with a slope of 20dB dec 1 RD CL The circuit only has one pole no zero at 1 RDCL so the slope drops from 0 to 20dB dec as we pass p1 7 8 Pole Identification Example I p1 1 RS Cin Pole Identification Example II p2 p1 1 RD CL 1 p2 1 RS Cin g m 1 RD CL 9 Circuit with Floating Capacitor 10 Miller s Theorem Z1 The pole of a circuit is computed by finding the effective resistance and capacitance from a node to GROUND The circuit above creates a problem since neither terminal of CF is grounded 11 ZF 1 Av Z2 ZF 1 1 Av If Av is the gain from node 1 to 2 then a floating impedance ZF can be converted to two grounded impedances Z1 and Z2 12 Miller Multiplication Example Miller Theorem in With Miller s theorem we can separate the floating capacitor However the input capacitor is larger than the original floating capacitor We call this Miller multiplication 1 RS 1 g m RD CF out 1 1 RD 1 g m RD CF 13 MOS Intrinsic Capacitances For a MOS there exist oxide capacitance from gate to channel junction capacitances from source drain to substrate and overlap capacitance from gate to source drain 14 Gate Oxide Capacitance Partition and Full Model The gate oxide capacitance is often partitioned between source and drain In saturation C2 Cgate and C1 0 They are in parallel with the overlap capacitance to form CGS and CGD 15 16 Example Capacitance Identification Transit Frequency 2 fT gm C 2 fT gm CGS Transit frequency fT is defined as the frequency where the current gain from input to output drops to 1 17 Unified Model for CE and CS Stages 18 Unified Model Using Miller s Theorem 19 20 Direct Analysis of CE and CS Stages z Example CE and CS Direct Analysis gm C XY p1 p 2 1 1 g m RL C XY RThev RThevCin RL C XY Cout 1 g m RL C XY RThev RThevCin RL C XY Cout p1 RThev RL CinC XY Cout C XY CinCout 1 1 g m1 rO1 rO 2 C XY RS RS Cin rO1 rO 2 C XY Cout 1 g m1 rO1 rO 2 C XY RS RS Cin rO1 rO 2 C XY Cout p2 Direct analysis yields different pole locations and an extra zero RS rO1 rO 2 CinC XY Cout C XY CinCout 21 Input Impedance of CE and CS Stages 22 Frequency Response of CG Stage p X 1 1 R S CX gm C X CGS CSB 1 RDCY CY CGD CDB p Y 1 r Zin C 1 gmRC C s 1 Zin CGS 1 gmRD CGD s 23 rO Similar to a CB stage the input pole is on the order of fT so rarely a speed bottleneck 24 Example CG Stage Pole Identification p X 1 p Y 1 RS CSB1 CGS 1 g m1 Emitter and Source Followers 1 1 CDB1 CGD1 CGS 2 CDB 2 gm2 25 Direct Analysis of Source Follower Stage The following will discuss the frequency response of emitter and source followers using direct analysis Emitter follower is treated first and source follower is derived easily by allowing r to go to infinity Example Source Follower Vout Vin CGS s Vout gm Vin as 2 bs 1 1 26 RS CGDCGS CGDCSB CGS CSB gm C CSB b RS CGD GD gm C GS s gm 2 as bs 1 1 RS C GD1C GS 1 C GD1 C GS 1 C SB1 C GD 2 C DB 2 g m1 C SB 1 C GD 2 C DB 2 C b R S C GD 1 GD 1 g m1 a a 27 28 Input Capacitance of Emitter Source Follower Example Source Follower Input Capacitance rO Cin C C 1 g m RL Cin CGD CGS 1 g m RL Cin CGD1 1 CGS 1 1 g m1 rO1 rO 2 29 Output Impedance of Source Follower 30 Active Inductor VX RS CGS s 1 I X CGS s g m 31 The plot above shows the output impedance of emitter and source followers Since a follower s primary duty is to lower the driving impedance RS 1 gm the active inductor characteristic on the right is usually observed 32 Example Output Impedance Frequency Response of Cascode Stage rO VX rO1 rO 2 CGS 3 s 1 IX CGS 3 s g m 3 Av XY 33 Poles of MOS Cascode p X C x 2C XY For cascode stages there are three poles and Miller multiplication is smaller than in the CE CS stage 34 MOS Cascode Example 1 p out g R S C GS 1 1 m 1 C GD 1 g m2 p Y g m1 1 gm2 1 R L C DB 2 C GD 2 p X 1 g R S C GS 1 1 m1 g m2 C GD 1 p out 1 R L C DB 2 C GD 2 1 gm2 1 C DB1 C GS 2 1 C GD1 gm2 g m1 p Y 35 1 gm2 1 C DB1 C GS 2 1 C GD1 C GD 3 C DB 3 gm2 g m1 36 I O Impedance of MOS Cascode Z in 1 Z out RL g m1 CGS 1 1 CGD1 s gm2 MOS Differential Pair Frequency Response 1 CGD 2 CDB 2 s 37 Example MOS Differential Pair 1 RS CGS 1 …
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