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Berkeley ELENG 105 - Lecture 10

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Lecture 10ANNOUNCEMENTS•Alan Wu will hold an extra lab session tomorr ow (9/28), 2‐4PMAlan Wu will hold an extra lab session tomorrow (9/28), 24PM• The post‐lab assignment for Experiment #4 has been shortened!• 2 pgs of notes (double‐sided, 8.5”×11”) allowed for Midterm #1OUTLINE• BJT Amplifiers (cont’d)CB t ith bi i–CB stage with biasing– Emitter follower (Common‐collector amplifier)– Analysis of emitter follower core–Impact of source resistance– Impact of Early effect–Emitter follower with biasingEE105 Fall 2007 Lecture 10, Slide 1Prof. Liu, UC BerkeleyEmitter follower with biasingReading: Chapter 5.3.3‐5.4Biasing of CB Stage• REis necessary to provide a path for the bias current Ito flow but it lowers the input impedanceIEto flow, but it lowers the input impedance.EEmEinRRRgRR =⋅==111||1EinvRvRv==EmEmEminRgRgg++11XoutoutvvvA()inSEmEinSinXvRRgRvRRv++=+=1EoutinXXoutinoutvRRgvvvvA=⋅=≡EE105 Fall 2007 Lecture 10, Slide 2Prof. Liu, UC Berkeley()SEmECminRRgRRgv ++⋅=1Reduction of Input Impedance Due to RE• The reduction of input impedance due to i1is undesirable because it shunts part of the input p pcurrent to ground instead of to Q1 (and RC).Æ Choose RE>> 1/gm, i.e. ICRE>> VTEE105 Fall 2007 Lecture 10, Slide 3Prof. Liu, UC BerkeleyCreation of Vb• A resistive voltage divider lowers the gain.•To remedy this problem a capacitor is inserted•To remedy this problem, a capacitor is inserted between the base and ground to short out the resistive voltage divider at the frequency of interest.resistive voltage divider at the frequency of interest.EE105 Fall 2007 Lecture 10, Slide 4Prof. Liu, UC BerkeleyExample of CB Stage with Bias Design a CB stage for Av = 10 and Rin = 50Ω.•Rin=50Ω ≈1/gmifRE>> 1/gmVCC= 2.5VIS= 5x10-16Aβ =100Rin 50Ω 1/gmif RE>> 1/gmÆ Choose RE= 500Ωβ 100VA = ∞•Av= gmRC = 10 Æ RC= 500Ω• IC= gm∙VT= 0.52mA•V=Vln(I/I)=0 899VVBE=VTln(IC/IS)=0.899V• Vb= IERE+ VBE = 1.16V• Choose R1and R2to provide Vband I1>> IB, e.g. I1= 52µA•Cis chosen so that (1/(β+1))(1/ωC) is small compared toEE105 Fall 2007 Lecture 10, Slide 5Prof. Liu, UC Berkeley•CBis chosen so that (1/(β+1))(1/ωCB) is small compared to 1/gmat the frequency of interest. Emitter Follower (Common Collector Amplifier)(Common Collector Amplifier) EE105 Fall 2007 Lecture 10, Slide 6Prof. Liu, UC BerkeleyEmitter Follower Core• When the input voltage (Vin) is increased by ∆Vin, the collector current (and hence the emitter current) ( )increases, so that the output voltage (Vout) is increased.• Note that Vinand Voutdiffer by VBE.EE105 Fall 2007 Lecture 10, Slide 7Prof. Liu, UC BerkeleyUnity‐Gain Emitter Follower• In integrated circuits, the follower is typically realized as shown belowas shown below.– The voltage gain is 1 because a constant collector current (= I1) results in a constant VBE; hence ∆Vout = ∆Vin .∞=AV1=vAEE105 Fall 2007 Lecture 10, Slide 8Prof. Liu, UC BerkeleySmall‐Signal Model of Emitter Follower• The voltage gain is less than 1 and positive. outoutinvvvvvitttKCL +−=ππ∞=AV()outoutinEoutmvvvgvvRvgr :emitterat KCL=−+−=+πππ()EoutEoutinmRvRvvgr111≈==+πmEEingRRrv1111+⋅++βπEE105 Fall 2007 Lecture 10, Slide 9Prof. Liu, UC BerkeleyEmitter Follower as a Voltage Divider∞=AVAEE105 Fall 2007 Lecture 10, Slide 10 Prof. Liu, UC BerkeleyEmitter Follower with Source Resistance∞=AV11++=βSEEinoutRRRvvEE105 Fall 2007 Lecture 10, Slide 11 Prof. Liu, UC Berkeley1+βmEgInput Impedance of Emitter Follower• The input impedance of an emitter follower is the same as that of a CE stage with emitter degenerationsame as that of a CE stage with emitter degeneration (whose input impedance does not depend on the resistance between the collector and VCC).CC)∞=AVExinRrivR)1(βπ++=≡EE105 Fall 2007 Lecture 10, Slide 12 Prof. Liu, UC BerkeleyExini)(βπEffect of BJT Current Gain• There is a current gain of (β+1) from base to emitter.ff i l h ld i f h b i• Effectively, the load resistance seen from the base is multiplied by (β+1).EE105 Fall 2007 Lecture 10, Slide 13 Prof. Liu, UC BerkeleyEmitter Follower as a Buffer • The emitter follower is suited for use as a buffer between a CE stage and a small load resistance, tobetween a CE stage and a small load resistance, to alleviate the problem of gain degradation.speaker221)1( RrRinβπ++=()A()speakerRRgACmv=EE105 Fall 2007 Lecture 10, Slide 14 Prof. Liu, UC Berkeley()1inCmvRRgA=Output Impedance of Emitter Follower• An emitter follower eff ectively lower s the source impedance by a factor of β+1, for improved driving p yβ, p gcapability. • The follower is a good “voltage buffer” because it has hh d d l dhigh input impedance and low output impedance.EsoutRRR||11⎠⎞⎜⎜⎝⎛+=βEE105 Fall 2007 Lecture 10, Slide 15 Prof. Liu, UC BerkeleyEmoutg||1⎠⎜⎝+βEmitter Follower with Early Effect• Since rO is in parallel with RE, its eff ect can be easily incorporated into the equations for the voltage gainincorporated into the equations for the voltage gain and the input and output impedances.SOEOEvRrRrRA1||||++=()( )OEinmOERrRrRg1||11||⎞⎛++=+ββπEE105 Fall 2007 Lecture 10, Slide 16 Prof. Liu, UC BerkeleyOEmsoutrRgRR ||||11⎟⎟⎠⎞⎜⎜⎝⎛++=βEmitter Follower with Biasing• A biasing technique similar to that used for the CE stage can be used for the emitter followerstage can be used for the emitter follower. • Note that VBcan be biased to be close to VCCbecause the collector is biased at VCC.CC.EE105 Fall 2007 Lecture 10, Slide 17 Prof. Liu, UC BerkeleySupply‐Independent Biasing• By putting an independent current source at the emitter the bias point (IV) is fixed regardless ofemitter, the bias point (IC, VBE) is fixed, regardless of the supply voltage value.EE105 Fall 2007 Lecture 10, Slide 18 Prof. Liu, UC BerkeleySummary of Amplifier Topologies• The three amplifier topologies studied thus far have different properties and are used on different occasions. pp• CE and CB stages have volt age gain with magnitude greater than one; the emitter follower’s voltage gain is at most one.EE105 Fall 2007 Lecture 10, Slide 19 Prof. Liu, UC BerkeleyAmplifier Example #1• The keys to solving this problem are recognizing the AC ground betweenRandRand using a TheveninAC ground between R1 and R2, and using a Thevenin transformation of the input network.CE stage Small-signal Simplified small-signal equivalent circuit


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Berkeley ELENG 105 - Lecture 10

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