9 MOS Capacitor in Depletion The Threshold Voltage VTn Now we make VGB VFB Note that thermal equilibrium falls into this range of applied bias x QG charge density Keep increasing VGB surface potential keeps increasing At some point the surface is n type i e we say that it is inverted The gate bulk potential at the onset of inversion is called the threshold voltage VTn To find the threshold voltage we need to consider the electrostatics in depletion no electrons at the surface at the onset of inversion with the surface potential equal to the opposite of the bulk potential Xd 0 tox qNa s max p x x E x 1 5 V electric field VTn n 0 tox Xd 1V x s max p 420 mV Vox 500 mV x VGB n potential VTn VFB 1V Xd max tox 0 VGB 500 mV 500 mV tox 0 s 185 mV x VB max p Xd x 500 mV Surface potential at oxide silicon interface is now positive n type slightly ns 1013 cm 3 EECS 105 Fall 1998 Lecture 9 EECS 105 Fall 1998 Lecture 9 Threshold Voltage Expression We can solve for the threshold voltage We consider the surface potential as fixed pinned at s max 2 p V T V FB V ox V B max x The drop across the depletion region is 1 5 V V B max s max p p p 2 p 1 0 V The drop across the oxide for VGB VTn is tox Q B max Q B max V ox E ox t ox t ox C ox ox Vox 500 mV VGB VFB 0 The Inverted MOS Capacitor VGB VTn s max 420 mV Xd max x 2 p 500 mV Substituting for the bulk charge found from the potential drop across the depletion region we find Inversion charge QN at SiO2 silicon surface balances extra charge on gate as VGB increases Q N C ox V GB V Tn 1 V Tn V FB 2 p 2q s N 2 p a C ox EECS 105 Fall 1998 Lecture 9 EECS 105 Fall 1998 Lecture 9 Charge Storage in the MOS Structure MOS Capacitance Three regions of operation Accumulation qG Cox vGB vFB parallel plate capacitor Depletion qG qB vGB with the bulk depletion charge in the silicon being a nonlinear function of vGB V GB Inversion qG qN qB max where qB max qB vGB VT is the depletion charge at the onset of inversion and The capacitance of the MOS structure is defined as dqG C dv GB From sketch determine the slope and plot as the capacitance Sketch of the gate charge as a function of gate bulk voltage C C cm2 qG C cm2 VFB VFB VTn VTn VGB V VGB V EECS 105 Fall 1998 Lecture 9 EECS 105 Fall 1998 Lecture 9 Physical Interpretation of MOS Capacitance MOS Field Effect Transistors Accumulation parallel plate capacitor C Cox active area thin oxide area Depletion increment in gate charge is mirrored at bottom of depletion region so capacitance model is Cox in series with the depletion region capacitance Cb gate interconnect gate contact polysilicon gate contact n polysilicon gate gate Si SiO2 surface bulk ox C ox t ox s C b Xd Note that Xd is a function of VGB A metal interconnect A source contacts W C C ox C b Inversion bulk charge is no longer changing with VGB an increment in gate charge is mirrored in the inversion layer under the gate The capacitance is therefore the same as in accumulation C Cox bulk contact drain contacts edge of active area drain interconnect source interconnect a gate oxide source interconnect n polysilicon gate bulk drain interconnect interconnect deposited oxide L n drain diffusion Ldiff field n source diffusion oxide p type p b EECS 105 Fall 1998 Lecture 9 EECS 105 Fall 1998 Lecture 9 MOSFET Circuit Symbols Two complementary devices each with two symbols both are very useful p substrate n type channel under gate oxide n substrate p type channel under gate oxide IDn G D IDn VDS 0 B VBS VGS S D G B S a n channel MOSFET Drain Gate Source n p n S S VSG G VSB B VSD 0 IDp B D IDp D b p channel MOSFET Source Bulk or Body G Gate Drain p n Bulk or Body p Four electrical terminals source lowest potential for n channel highest for pchannel drain gate and bulk Basic concept inversion layer called the channel formed under gate between source and drain enables drift current EECS 105 Fall 1998 Lecture 9 EECS 105 Fall 1998 Lecture 9
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