Today s Lecture Modeling the ADC decimation filter Decimated DFTs Fixed and floating point comparisons Troubleshooting and test modes Multistage decimation filters A D DSP Parks McClellan filters Manual decimators Hogenauer filters Half band filters EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 1 Filter 2 Responses Decimation Filter Gain dB 160 floating point coefficients 23b coefficients 120 80 40 0 40 0 A D DSP 10 20 EECS 247 Lecture 24 Multi Rate Filters 30 40 50 kHz 2002 B Boser 2 Amplitude or Integrated Noise dBFS ADC Output DFT 0 40 80 120 160 0 A D DSP 5kHz 1Vrms analog input filter 2 24b coefficients fSOUT 46 875kHz 1000 point DFT 10 averages 5 10 15 20 EECS 247 Lecture 24 Multi Rate Filters 25 kHz 2002 B Boser 3 Amplitude or Integrated Noise dBFS ADC Output DFT 0 40 Difference is negligible 80 120 start of decimation filter rolloff 160 0 A D DSP same as previous slide except floating point coefficients 5 10 EECS 247 Lecture 24 Multi Rate Filters 15 20 25 kHz 2002 B Boser 4 Production Testing It s obvious that decimation filters obscure many details of modulator analog performance Most of the shaped quantization noise is filtered away Was the modulator fabricated correctly Are there defects in a given chip At this stage you ve got to consider possible production test modes A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 5 Test Modes All ADC designs must provide at least the following test modes Output unfiltered 1 bit modulator output samples Insert test vectors at the decimation filter input Any mixed signal IC which includes any ADC must provide for observability of unprocessed ADC output samples Think of it as fault coverage in the analog domain Let s see how our decimation filter obscures a typical modulator manufacturing defect A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 6 Test Modes Suppose the modulator is built with an open fault in a metal trace which connects up the switched capacitor implementing the b2 capacitor b2 sets one of the quantization noise zeroes If the b2 capacitor is missing b2 0 In the real world this defect will occur in 1 10ppm of production units The next two slides highlight the loop filter defect and show decimated DFTs with and without the defect A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 7 Loop Filter Defect b2 0 defect b1 b2 k1 IN 1 from 1 z summer a1 k2z 1 1 z 1 k3z 1 1 z 1 a2 k4z 1 1 z 1 k5z 1 1 z 1 a4 a3 a5 OUT to comparator A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 8 ADC Output DFT Amplitude dBFS 0 5kHz 1Vrms analog input fSOUT 46 875kHz 1000 point DFT 10 averages b2 nominal b2 0 defect 40 80 120 160 0 A D DSP 5 10 15 EECS 247 Lecture 24 Multi Rate Filters 20 25 kHz 2002 B Boser 9 Test Modes The small increase in noise above 20kHz would probably be missed in production test Dynamic range is specified to include only noise from 020kHz Should we ship the defective unit Absolutely not The metal shrapnel pattern associated with the defect is unknown and it may lead to a catastrophic failure later reliability problem Let s see if a 1 bit test mode can detect the fault A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 10 ADC 1 bit Test Mode 0 10dB shift in noise is easy to detect without averaging Amplitude dBFS 40 5kHz 1Vrms analog input 30000 point DFT 20 averages b2 nominal b2 0 defect 80 120 160 0 A D DSP 30 60 90 120 EECS 247 Lecture 24 Multi Rate Filters 150 kHz 2002 B Boser 11 ADC 1 bit Test Mode 0 many other loop filter defects lead to visible changes in the highest Q pole in the noise shape Amplitude dBFS 40 5kHz 1Vrms analog input 30000 point DFT 20 averages b2 nominal b2 0 defect 80 120 160 0 A D DSP 30 60 EECS 247 Lecture 24 Multi Rate Filters 90 120 150 kHz 2002 B Boser 12 Test Modes Models can analyze whether or not a specific defect is observable with a given test mode Many defect observability analyses are required to improve quality levels from 100ppm defective to 10ppm defective These models improve over the production life of a chip and from generation to generation If big customers detect a quality defect they demand corrective action to improve tests so that units with the same defect won t be shipped again Without 1 bit test modes you re sunk A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 13 Multitone Tests As long as we re on the subject of testing let s examine a fast effective method to look at the frequency response of a filter or ADC This method is used extensively in production tests of both analog filters and ADCs It is not a substitute for classic fault coverage testing of digital filters A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 14 Multitone Tests IC testers can add sinewaves at many different frequencies in the digital domain The digital sum is sent to a test system DAC which generates the analog input for a device under test Frequency response at many different input frequencies can be determined with one test Let s see how our ADC responds to an input which is a sum of 20 21 22 23 24 375 25 375 26 375 and 27 375kHz sinewaves A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 15 ADC Multitone DFT 0 Amplitude dBFS 40 80 Multitone analog input filter 2 24b coefficients fSOUT 46 875kHz 1000 point DFT 10 averages 120 160 0 A D DSP 5 10 EECS 247 Lecture 24 Multi Rate Filters 15 20 25 kHz 2002 B Boser 16 ADC Multitone DFT 0 20 21 22 23 Amplitude dBFS 40 80 27 375kHz alias buried by noise aliased 24 375 120 aliased 25 375 aliased 26 375 160 15 A D DSP 17 19 21 23 EECS 247 Lecture 24 Multi Rate Filters 25 kHz 2002 B Boser 17 Multitone Tests Note how elegantly the multitone output amplitudes trace the transition band of the decimation filter Total observation time 1000 ADC output samples must be long enough to resolve each of the individual frequencies Hz bin is the reciprocal of the total observation time A D DSP EECS 247 Lecture 24 Multi Rate Filters 2002 B Boser 18 Multistage Decimation Filters Decimation filter 2 can be realized with a accumulator rate of 57MHz shift register and coefficient ROM Absolutely practical in today s CMOS processes A multiplier is not needed Multi rate decimators can achieve the same result with even lower processing cost We will Illustrate how multistage decimation requires substantially lower multiply accumulate rates than single stage decimation …
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