EECS 247 Analog Digital Interface Integrated Circuits 2008 Instructor Haideh Khorramabadi UC Berkeley Department of Electrical Engineering and Computer Sciences Lecture 1 Introduction EECS 247 Lecture 1 Introduction 2008 H K Page 1 Instructor s Technical Background Ph D EECS department UC Berkeley 1985 advisor Prof P R Gray Thesis topic Continuous time CMOS high frequency filters Industrial background 11 years at ATT Bell Laboratories N J in the R D area as a circuit designer Circuits for wireline communications CODECs ISDN and DSL including ADCs nyquist rate over sampled DACs filters VCOs Circuits intended for wireless applications Fiber optics circuits 3 years at Philips Semiconductors Sunnyvale CA Managed a group in the RF IC department developed ICs for CDMA analog cell phones 3 years Broadcom Corp Director of Analog RF ICs in San Jose CA Projects Gigabit Ethernet TV tuners and DSL circuitry Currently consultant for IC design Teaching experience Has taught co taught EE247 UCB since 2003 Instructor for short courses offered by MEAD Electronics Adjunct Prof Rutgers Univ N J Taught a graduate level IC course EECS 247 Lecture 1 Introduction 2008 H K Page 2 Administrative Issues Course web page http inst eecs berkeley edu EE247 fa08 Course notes will be uploaded on the course website prior to each class Homeworks due dates are posted on the course website Announcements regarding the course will be posted on the home page please visit course website often Lectures are web cast http webcast berkeley edu courses Please try to attend the classes live to benefit from direct interactions Make sure you use the provided microphones when asking questions or commenting in the class EECS 247 Lecture 1 Introduction 2008 H K Page 3 Office Hours Grading Office hours Tues Thurs 2 30 3 30pm 477 Cory Hall unless otherwise announced in the class Extra office hours by appointment Feel free to discuss issues via email haidehk eecs berkeley edu Course grading Homework project 50 Midterm 20 tentative date Oct 16 Final 30 EECS 247 Lecture 1 Introduction 2008 H K Page 4 Prerequisites CAD Tools Prerequisites Basic course in signal processing Laplace and ztransform discrete Fourier transform i e EE120 Fundamental circuit concepts i e EE105 and EE140 CAD Tools Hspice or Spectre Matlab EECS 247 Lecture 1 Introduction 2008 H K Page 5 Analog Digital Interface Circuitry Analog Output Analog Input Analog World Analog Digital Interface 001 110 010 Digital Processor 1001 1010 0010 Digital Analog Interface Naturally occurring signals are analog To process signals in the digital domain Need Analog Digital Digital Analog interface circuitry Question Why not perform the signal processing in the analog domain only thus eliminate need for A D D A EECS 247 Lecture 1 Introduction 2008 H K Page 6 CMOS Technology Evolution versus Time ft GHz 0 065u 100 0 045u 0 13u 0 1u 0 25u 0 18u 0 35u 0 6u 0 8u 10 2u 1 1 5u 1u 3u Year 6u 75 80 85 90 95 00 05 10 For NMOS VGS Vth 0 5V Ref Paul R Gray UCB EE290 course 95 International Technology Roadmap for Semiconductors EECS 247 Lecture 1 Introduction http public itrs net 2008 H K Page 7 CMOS Device Evolution Progression from 1975 to 2005 Minimum feature sizes X1 100 Cut off frequency ft X300 Minimum size device area 1 L2 Number of interconnect layers X8 EECS 247 Lecture 1 Introduction 2008 H K Page 8 Impact of CMOS Scaling on Digital Signal Processing Direct beneficiary of VLSI technology down scaling Digital circuits deal with 0 1 signal levels only Not sensitive to analog noise Si Area function reduced drastically due to Shrinking of feature sizes Multi metal levels for interconnections currently 8 metal level v s only 1 in the 1970s Enhanced functionality flexibility Amenable to automated design test Arbitrary precision Provides inexpensive storage capability EECS 247 Lecture 1 Introduction 2008 H K Page 9 Analog Signal Processing Characteristics Sensitive to analog noise Has not fully benefited from technology down scaling Supply voltages scale down accordingly Reduced voltage swings more challenging analog design Reduced voltage swings requires lowering of the circuit noise to keep a constant dynamic range Higher power dissipation and chip area Not amenable to automated design Extra precision comes at a high price Rapid progress in DSP has imposed higher demands on analog digital interface circuitry Plenty of room for innovations EECS 247 Lecture 1 Introduction 2008 H K Page 10 Cost Function Comparison DSP Analog Digital circuitry Fully benefited from CMOS device scaling Cost function decreases by 29 each year Cost function X1 30 in 10 years Analog circuitry Not fully benefited from CMOS scaling Device scaling mandates drop in supply voltages threaten analog feasibility Cost function for analog ckt almost constant or increase Rapid shift of function implementation from processing in analog domain to digital hence increased need for A D D A interface circuitry Ref International Technology Roadmap for Semiconductors EECS 247 Lecture 1 Introduction http public itrs net 2008 H K Page 11 Digitally Assisted Analog Circuitry Analog design has indeed benefited from the availability of inexpensive onchip digital capabilities Examples Compensating calibrating ADC DAC inaccuracies Automatic frequency tuning of filters VCOs DC offset compensation EECS 247 Lecture 1 Introduction 2008 H K Page 12 Analog Digital Interface Circuitry Example Digital Audio Goal Lossless archival and transmission of audio signals Circuit functions Preprocessing Amplification Anti alias filtering Analog Input Analog Preprocessing A D Conversion A D Conversion Resolution 16Bits DSP Storage Processing e g recognition D A Conversion Postprocessing Smoothing filter Variable gain amplification DSP D A Conversion Analog Postprocessing Analog Output EECS 247 Lecture 1 Introduction 2008 H K Page 13 Example Dual Mode CDMA IS95 Analog Cellular Phone RF Baseband EECS 247 Lecture 1 Introduction 2008 H K Page 14 Example Typical Dual Mode Cell Phone Contains in integrated form the following interface circuitry 4 RX filters 3 or 4 TX filters 4 RX ADCs 2 TX DACs 3 Auxiliary ADCs 8 Auxiliary DACs Dual Standard I Q Audio Tx Rx power control Battery charge control display Total Filters 8 ADCs 7 DACs 12 EECS 247 Lecture 1 Introduction 2008 H K Page 15 Areas Utilizing Analog Digital Interface Circuitry Communications Wireline communications Telephone related DSL ISDN CODEC Television circuitry Cable modems TV tuners Ethernet Gigabit 10
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