EECS 247 Lecture 7: Filters © 2008 H.K. Page 1EE247 Lecture 7• Automatic on-chip filter tuning (continued from last lecture)– Continuous tuning (continued)• Reference integrator locked to reference frequency• DC tuning of resistive timing element– Periodic digitally assisted filter tuning• Systems where filter is followed by ADC & DSP, existing hardwarecan be used to periodically update filter freq. response• Continuous-time filters– Highpass filters– Bandpass filters• Lowpass to bandpass transformation•Example: 6thorder bandpass filter• Gm-C BP filter using simple diff. pairEECS 247 Lecture 7: Filters © 2008 H.K. Page 2Summary last lecture• Continuous-time filters– Opamp MOSFET-RC filters– Gm-C filters• Frequency tuning for continuous-time filters– Trimming via fuses or laser – Automatic on-chip filter tuning• Continuous tuning– Utilizing VCF built with replica integrators– Use of VCO built with replica integrators– To be continued………..EECS 247 Lecture 7: Filters © 2008 H.K. Page 3Master-Slave Frequency Tuning3-Reference Integrator Locked to Reference FrequencytuneVGmCVin• Replica of main filter building block e.g. Gm-C integrator used • Utilizes the fact that a DC voltage source connected to the input of the Gm cell generates a constant current at the output proportional to the transconductance and the voltage referenceI = Gm.VrefReplica of main filter integrator VoutVrefI=Gm*VrefEECS 247 Lecture 7: Filters © 2008 H.K. Page 4Reference Integrator Locked to Reference FrequencyC1refVGmVTC1=× ×tuneVGmC1Vin• Consider the following sequence: Integrating capacitor is fully discharged @ t =0 At t=0 the capacitor is connected to the output of the Gm cell for T amount of time then:VC1VC1TVrefI=Gm*Vreft=0timeC1 C1refC1refQVC1GmV TVGmVTC1=×=× ×→=× ×0EECS 247 Lecture 7: Filters © 2008 H.K. Page 5Reference Integrator Locked to Reference FrequencyclkCNTGm f==C1refVGmVTC1≈× ×tuneVGmCISince at the end of the period T:If VC1is forced to be equal to Vrefthen:How do we manage to force VC1=Vref ?Æ Use feedback!!VC1VC1TVreft=0timeC1refVGmVTC1≈× ×I=Gm*VrefEECS 247 Lecture 7: Filters © 2008 H.K. Page 6Reference Integrator Locked to Reference FrequencyS2S1S3GmC1C2VrefA• Three clock phase operation • To analyze Æ study one phase at a timeReplica of main filter Gm Ref: A. Durham, J. Hughes, and W. Redman- White, “Circuit Architectures for High Linearity Monolithic Continuous-Time Filtering,” IEEE Transactions on Circuits and Systems, pp. 651-657, Sept. 1992.EECS 247 Lecture 7: Filters © 2008 H.K. Page 7Reference Integrator Locked to Reference Frequency P1 highÆ S1 closedS2S1S3GmC1C2VrefC1 Ædischarged ÆVC1=0C2Æretains its previous chargeAEECS 247 Lecture 7: Filters © 2008 H.K. Page 8Reference Integrator Locked to Reference FrequencyP2 high Æ S2 closedS2S3GmC1C2VrefAI=Gm*VrefP2VC1C1refVGmVT2C1=× ×T1T2C1 Æcharged with constant current: I=Gm*VrefC2Æretains its previous chargeEECS 247 Lecture 7: Filters © 2008 H.K. Page 9Reference Integrator Locked to Reference Frequency P3 high Æ S3 closedC1 charge shares with C2Few cycles following startup Assuming A is large, feedback forces:ΔV Æ0ÆVC2= VrefS2S3GmC1C2VrefAT1T2ΔVEECS 247 Lecture 7: Filters © 2008 H.K. Page 10Reference Integrator Locked to Reference Frequency P3 high Æ S3 closedS2S3GmC1C2VrefAC1 C2C1refrefrefVVVrefsince V Gm V T2C1then: V Gm V T2C1C1or: T2 N / fclkGm:===× ×=× ×==T1T2EECS 247 Lecture 7: Filters © 2008 H.K. Page 11SummaryReplica Integrator Locked to Reference FrequencyFeedback forces Gm to assume a value so that :S2S3GmC1C2VrefAintgintg0C1N/fclkGmorGmfclk / NC1τω====• Integrator time constant locked to an accurate frequency• Tuning signal used to adjust the time constant of the main filter integratorsTuning SignalTo Main FilterEECS 247 Lecture 7: Filters © 2008 H.K. Page 12Issues1- Loop StabilityS2S3GmC1C2VrefA• Note: Need to pay attention to loop stability9 C1 chosen to be smaller than C2 – tradeoff between stability and speed of lock acquisition9 Lowpass filter at the output of amplifier (A) helps stabilize the loopTuning SignalTo Main FilterEECS 247 Lecture 7: Filters © 2008 H.K. Page 13Issues2- GM-Cell DC Offset Induced ErrorProblems to be aware of:Æ Tuning error due to master integrator DC offsetS2S3GmC1C2VrefATo MainFilterintg0Gmfclk / NC1ω==EECS 247 Lecture 7: Filters © 2008 H.K. Page 14Issues Gm Cell DC OffsetWhat is DC offset?Simple example: For the differential pair shown here, mismatch in input device or load characteristics would cause DC offset:ÆVo = 0 requires a non-zero input voltageOffset could be modeled as a small DC voltage source at the input for which with shorted inputsÆ Vo = 0Example: Differential PairoVinV-++-M1 M2VosVtuneEECS 247 Lecture 7: Filters © 2008 H.K. Page 15Simple Gm-Cell DC Offset()()()M1,2os ov1,2th1 th2M1,2WL1VVVVW2LΔ=−−Mismatch associated with M1 & M2 Æ DC offsetAssuming offset due to load device mismatch is negligibleoVinV-++-M1 M2VosVtuneRef: Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001, page 335EECS 247 Lecture 7: Filters © 2008 H.K. Page 16Gm-Cell Offset Induced Error()C1 C2C1refC1 osrefosrefVVVrefIdeal V Gm V T2C1with offset: V Gm V V T2C1VC1or: T2 1GmV:===× ×=× − ×⎛⎞⎜⎟=−⎜⎟⎝⎠VrefVosS2S3GmC1C2AI=Gm(Vref - Vos)•Effect of Gm-cell DC offset: Voltage sourcerepresenting DC offsetEECS 247 Lecture 7: Filters © 2008 H.K. Page 17Gm-Cell Offset Induced ErrorVrefVosS2S3GmC1C2AI=Gm(Vref-Vos)•Example:
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