EE247 Lecture 26 Administrative Project submission Project reports due Dec 5th Please make an appointment with the instructor for a 15minute meeting on Monday Dec 8th Prepare to give a 3 to 7 minute presentation regarding the project during the class period on Dec 9th Highlight the important aspects of your approach towards the implementation of the ADC If the project is joint effort one or both could present EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 1 EE247 Lecture 26 Homework for oversampled data converters Due to the time consuming nature of the project homework covering oversampled converters will not be given Please review relevant previous year homeworks solutions e g http wwwinst eecs berkeley edu ee247 fa07 files07 homew ork HW9 2 07 pdf http wwwinst eecs berkeley edu ee247 fa07 files07 homew ork HW9 sol Lynn Wang pdf EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 2 EE247 Lecture 26 Final course grading Homeworks 7 Project Midterm exam Final exam EECS 247 Lecture 25 Oversampled ADCs 30 20 20 30 2008 H K Page 3 EE247 Lecture 26 Oversampled ADCs continued 2nd order modulator Implementation example Higher order modulators Cascaded modulators multi stage Single loop single quantizer modulators with multi order filtering in the forward path Bandpass modulators Testing of modulator front end EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 4 2nd Order Implementation Example Digital Audio Applications Measured simulated spurious tones performance as a function of DC input signal Sampling rate 12 8MHz M 256 Ref B P Brandt et al Second order sigma delta modulation for digital audio signal acquisition IEEE Journal of Solid State Circuits vol 26 pp 618 627 April 1991 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 5 2nd Order Implementation Example Digital Audio Applications Sampling rate 12 8MHz M 256 Measured simulated noise tone performance for near zero DC worst case input 0 00088 Ref B P Brandt et al Second order sigma delta modulation for digital audio signal acquisition IEEE Journal of Solid State Circuits vol 26 pp 618 627 April 1991 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 6 Higher Order Modulator Dynamic Range Y z z 1 X z 1 z 1 1 SX 2 2 L E z L order 2 2L sinusoidal input STF 1 2 2 L 1 M 2 L 1 12 3 2 L 1 M 2 L 1 SX SQ 2 2 L SQ 1 3 2 L 1 DR 10log 2 2L M 2 L 1 3 2 L 1 2 L 1 10 log M 2L 2 DR 10log 2X increase in M 6L 3 dB or L 0 5 bit increase in DR EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 7 Modulator Dynamic Range As a Function of Modulator Order L 3 L 2 L 1 Potential stability issues for L 2 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 8 Higher Order Modulators Extending Modulators to higher orders by adding integrators in the forward path similar to 2nd order Issues with stability Two different architectural approaches used to implement modulators of order 2 1 Cascade of lower order modulators multi stage 2 Single loop single quantizer modulators with multi order filtering in the forward path EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 9 Higher Order Modulators 1 Cascade of 2 Stages Modulator Main quantizes the signal The 1st stage quantization error is then quantized by the 2nd quantizer The quantized error is then subtracted from the results in the digital domain EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 10 2nd Order 1 1 Cascaded Modulators 2nd order noise shaping Cascade of two 1st order s 2nd order EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 11 3rd Order Cascaded Modulators a Cascade of 1 1 1 s Can implement 3rd order noise shaping with 1 1 1 This is also called MASH multi stage noise shaping Cascade of two 1st order s 3rd order EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 12 3rd Order Cascaded Modulators b Cascade of 2 1 s Advantages of 2 1 cascade Low sensitivity to precision matching of analog digital paths Low spurious limit cycle tone levels No potential instability 3rd order noise shaping EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 13 Sensitivity of Cascade of 1 1 1 Modulators to Matching of Analog Digital Paths Matching of 1 28dB loss in DR Matching of 0 1 8dB loss in DR EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 14 Sensitivity of Cascade of 2 1 Modulators to Matching Error Accuracy of 3 2dB loss in DR Main advantage of 2 1 cascade compared to 1 1 1 topology Low sensitivity to matching of analog digital paths in excess of one order of magnitude less sensitive compared to 1 1 1 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 15 2 1 Cascaded Modulators Accuracy of 3 2dB loss in DR Ref L A Williams III and B A Wooley A third order sigma delta modulator with extended dynamic range IEEE Journal of Solid State Circuits vol 29 pp 193 202 March 1994 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 16 2 1 Cascaded Modulators Effect of gain parameters on signal to noise ratio EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 17 Comparison of 2nd order Cascaded 2 1 Modulator Digital Audio Application fN 50kHz Does not include Decimator Reference Brandt JSSC 4 91 Williams JSSC 3 94 Architecture 2nd order 2 1 Order Dynamic Range 98dB 16 bits 104dB 17 bits Peak SNDR 94dB 98dB Oversampling rate 256 theoretical SNR 109dB 128 theoretical SNR 128dB Differential input range 4Vppd 5V supply 8Vppd 5V supply Power Dissipation 13 8mW 47 2mW Active Area 0 39mm2 1 EECS 247 Lecture 25 tech Oversampled ADCs 5 2mm2 1 tech 2008 H K Page 18 2 1 Cascaded Modulators Measured Dynamic Range Versus Oversampling Ratio Theoretical 21dB Octave 3dB Octave Ref L A Williams III and B A Wooley A third order sigma delta modulator with extended dynamic range IEEE Journal of Solid State Circuits vol 29 pp 193 202 March 1994 EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 19 Higher Order Modulators 1 Cascaded Modulators Summary Cascade two or more stable stages Quantization error of each stage is quantized by the succeeding stage and subtracted digitally Order of noise shaping equals sum of the orders of the stages Quantization noise cancellation depends on the precision of analog digital signal paths Quantization noise further randomized less limit cycle oscillation problems Typically no potential instability EECS 247 Lecture 25 Oversampled ADCs 2008 H K Page 20 Higher Order Modulators 2 Multi Order Filter E z H z X z Y z Y z H z 1 X z E z 1 H z 1 H z NTF Y z E z 1 1 H z Zeros of NTF poles of H z can be strategically positioned to suppress in band noise spectrum …
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