Berkeley ELENG 247A - Analog-Digital Interface Integrated Circuits (19 pages)

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Analog-Digital Interface Integrated Circuits



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Analog-Digital Interface Integrated Circuits

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Pages:
19
School:
University of California, Berkeley
Course:
Eleng 247a - Introduction to Microelectromechanical Systems (MEM...
Introduction to Microelectromechanical Systems (MEM... Documents
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EECS 247 Analog Digital Interface Integrated Circuits 2005 Instructor Haideh Khorramabadi UCB Department of Electrical Engineering and Computer Sciences EECS 247 Lecture 1 Introduction 2005 H K Page 1 Administrative Course web page http www eecs berkeley edu EE247 All handouts are available on the web Office hours for Haideh Khorramabadi Tues Thurs 3 4pm 485 Cory Hall Email haidehk eecs berkeley edu Homework is posted on the course website and is due on Thursdays Midterm exam 10 20 05 EECS 247 Lecture 1 Introduction 2005 H K Page 2 Analog Digital Interface Circuits Analog Output Analog Input Analog World Analog Digital Interface 001 110 010 Digital Processor 1001 1010 0010 Digital Analog Interface Naturally occurring signals are analog Need Analog Digital Digital Analog interface circuits Question Why not process the signal with analog circuits only thus eliminate need for A D D A EECS 247 Lecture 1 Introduction 2005 H K Page 3 MOSFET Maximum ft versus Time ft 100GHz 0 1u 0 18u 0 13u 0 35u 0 25u 0 6u 0 8u 10GHz 1u 1 5u 2u 1GHz 3u 6u 75 Year 80 85 90 95 00 05 For MOS VGS Vth 0 5V Ref Paul R Gray UCB EE290 course 95 International Technology Roadmap for Semiconductors EECS 247 Lecture 1 Introduction http public itrs net 2005 H K Page 4 Digital Signal Processing Characteristics Direct benefit from the down scaling of VLSI technology Not sensitive to analog noise Enhanced functionality flexibility Amenable to automated design test Arbitrary precision Provides inexpensive storage capability EECS 247 Lecture 1 Introduction 2005 H K Page 5 Analog Signal Processing Characteristics Has not fully benefited from the down scaling of VLSI technology Supply voltages scale down accordingly Reduced voltage swings Reduced voltage swings requires lowering of the circuit noise to keep a constant dynamic range Higher power dissipation and chip area Sensitive to analog noise Not amenable to automated design Extra precision comes at a high price Availability of inexpensive digital capabilities on chip enables automatic adjustments to compensate for analog circuit impairments Rapid progress in DSP has imposed higher demands on analog digital interface circuitry Plenty of room for innovations EECS 247 Lecture 1 Introduction 2005 H K Page 6 Cost Function Comparison DSP Analog Digital circuitry Fully benefited from CMOS device scaling Cost function decreases by 29 each year Cost function 30X in 10 years Analog circuitry Not fully benefited from CMOS scaling Device scaling mandates drop in supply voltages threaten analog feasibility Cost function for analog ckt almost constant or increase Rapid shift of functions from analog to digital signal processing hence need for A D D A interface circuitry Ref International Technology Roadmap for Semiconductors EECS 247 Lecture 1 Introduction http public itrs net 2005 H K Page 7 Example Digital Audio Goal Lossless archival and transmission of audio signals Circuit functions Preprocessing Amplification Anti alias filtering Analog Input Analog Preprocessing A D Conversion A D Conversion Resolution 16Bits Sig bandwidth 41kHz DSP Storage Processing e g recognition D A Conversion Postprocessing Smoothing filter Variable gain amplification EECS 247 Lecture 1 Introduction DSP D A Conversion Analog Postprocessing Analog Output 2005 H K Page 8 Example Typical Dual Mode Cell Phone Contains in integrated form 4 Rx filters 4 Tx filters 4 Rx ADCs 4 Tx DACs 3 Auxiliary ADCs 8 Auxiliary DACs Dual Standard I Q Audio Tx Rx power control Battery charge control display Total Filters 8 ADCs 7 DACs 12 EECS 247 Lecture 1 Introduction 2005 H K Page 9 Areas Utilizing Analog Digital Interface Circuitry Communications Wireline communications Telephone related DSL ISDN CODEC Television circuitry Cable modems TV tuners Ethernet Gigabit 10 100BaseT Wireless Cellular telephone CDMA Analog GSM Wireless LAN Blue tooth 802 11a b g Radio analog digital Television Computing Control Storage media disk drives digital tape Imagers displays Instrumentation Test equipment Physical sensors actuators Consumer Electronics Audio CD DAT Automotive control appliances toys EECS 247 Lecture 1 Introduction 2005 H K Page 10 UCB Analog Courses EECS 247 240 242 EECS 247 Filters ADCs DACs some system level Signal processing fundamentals Macro models large systems some transistor level constraints such as finite gain supply voltage noise dynamic range considered CAD Tools Matlab SPICE EECS 240 Transistor level building blocks such as opamps buffers comparator Device and circuit fundamentals CAD Tools SPICE EECS 242 RF amplification mixing Oscillators Exotic technology devices Nonlinear circuits EECS 247 Lecture 1 Introduction 2005 H K Page 11 Material Covered in EE247 Filters Continuous time filters Biquads ladder type filters Opamp RC Opamp MOSFET C gm C filters Automatic frequency tuning Switched capacitor SC filters Data Converters D A converter architectures A D converter Nyquist rate ADC Flash Pipeline ADCs Oversampled converters Self calibration techniques Systems utilizing analog digital interfaces Wireline communication systems ISDN XDSL Wireless communication systems Wireless LAN Cellular telephone Disk drive electronics Fiber optics systems EECS 247 Lecture 1 Introduction 2005 H K Page 12 Introduction to Filters Filtering Frequency selective signal processing It s the most common type of signal processing Examples Extraction of desired signal from many radio Separating signal and noise Amplifier bandwidth limitations H j H j More Practical Filter Ideal Low Pass Brick Wall Filter EECS 247 Lecture 1 Introduction 2005 H K Page 13 Simplest Filter First Order RC Filter LPF1 Steady state frequency response H s Vout s Vin s with EECS 247 Lecture 1 Introduction 1 1 s o o 1 RC 2 100kHz 2005 H K Page 14 Poles and Zeros s plane pzmap j 1 H s 1 s o Pole p o Zero z 1 H s 1 j p o 1 o 1 2 2 o EECS 247 Lecture 1 Introduction 2005 H K Page 15 Filter Frequency Response Bode Plot 0 H s j 0 Asymptotes 20dB dec magnitude rolloff 90degrees phase shift per 2 decades 0 20 40 100dB 60 80 100 120 0 Phase deg H s j 1 2 Magnitude dB H s j 0 1 30 60 90 4 1 2 3 10 10 10 10 5 6 7 10 10 10 9 8 10 10 10 10 Frequency Hz Question can we really get 100dB attenuation at 10GHz EECS 247 Lecture 1 Introduction 2005 H K Page 16 First Order Low Pass RC Filter Including Parasitics LPF2 1 sRCP H s 1 sR C C P Pole p 1 1 R C CP RC Zero z 1 RCP EECS 247 Lecture 1 Introduction 2005 H K Page 17 Filter Frequency Response H j CP C CP CP C 10 3 60dB 20 40 60


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