EE247 Lecture 25 Oversampled ADCs continued Higher order SD modulators Last lecture Cascaded SD modulators MASH continued Single loop single quantizer modulators with multi order filtering in the forward path Example 5th order Lowpass SD Modeling Noise shaping Effect of various nonidealities on the SD performance Bandpass SD modulators EECS 247 Lecture 25 Oversampled ADCs 2010 Page 1 EE247 Lecture 25 Administrative Final exam Date Tues Dec 14th Time 8am 11am Location 299 Cory change of location Closed book course notes No calculators cell phones PDAs Computers You can bring two 8x11 paper with your own notes Final exam covers the entire course material unless specified EECS 247 Lecture 25 Oversampled ADCs 2010 Page 2 EE247 Lecture 25 Project Project reports due today Please make an appointment with the instructor via sign up sheet for a 20 minute meeting per team for Wed Dec 1th Prepare to give a 10 minute presentation regarding the project during the class period on Dec 2nd Dec 7th Highlight the important aspects of your approach towards the implementation of the ADC teach us If the project is joint effort both team members should present Email your PowerPoint presentation files to the instructor two hours prior to class to be put in one presentation file in order to conserve class time EECS 247 Lecture 25 Oversampled ADCs 2010 Page 3 Example 2 1 Cascaded SD Modulators Accuracy of 3 2dB loss in DR Various combinations of variables b l b can be used Authors have explored combination resulting in max DR Ref L A Williams III and B A Wooley A third order sigma delta modulator with extended dynamic range IEEE Journal of Solid State Circuits vol 29 pp 193 202 March 1994 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 4 2 1 Cascaded SD Modulators Effect of gain parameters on signal to noise ratio Ref L A Williams III and B A Wooley A third order sigma delta modulator with extended dynamic range IEEE Journal of Solid State Circuits vol 29 pp 193 202 March 1994 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 5 2 1 Cascaded SD Modulators Measured Dynamic Range Versus Oversampling Ratio Theoretical SQNR 21dB Octave 3dB Octave Ref L A Williams III and B A Wooley A third order sigma delta modulator with extended dynamic range IEEE Journal of Solid State Circuits vol 29 pp 193 202 March 1994 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 6 Comparison of 2nd order Cascaded 2 1 SD Modulator Test Results Digital Audio Application fN 44 1kHz Does not include Decimator Reference Brandt JSSC 4 91 Williams JSSC 3 94 Architecture 2nd order 2 1 Order Dynamic Range 98dB 16 bits 104dB 17 bits Peak SNDR 94dB 98dB Oversampling rate 256 theoretical SQNR 109dB 18bit 128 theoretical SQNR 128dB 21bit Differential input range 4Vppd 5V supply 8Vppd 5V supply Power Dissipation 13 8mW 47 2mW Active Area 0 39mm2 1m EECS 247 Lecture 25 tech 5 2mm2 1m tech Oversampled ADCs 2010 Page 7 Higher Order SD Modulators 1 Cascaded Modulators Summary Cascade two or more stable SD stages Quantization error of each stage is quantized by the succeeding stage s and subtracted digitally Order of noise shaping equals sum of the orders of the stages Quantization noise cancellation depends on the precision of analog digital signal paths Quantization noise further randomized less limit cycle oscillation problems Typically no potential instability EECS 247 Lecture 25 Oversampled ADCs 2010 Page 8 Higher Order Lowpass SD Modulators 2 Forward Path Multi Order Filter E z S X z Y z NTF H z N z D z S Y z H z 1 X z E z 1 H z 1 H z Y z 1 E z 1 H z D z D z N z Zeros of NTF poles of H z can be positioned to minimize baseband noise spectrum Approach Design NTF first and solve for H z Main issue Ensuring stability for 3rd and higher orders EECS 247 Lecture 25 Oversampled ADCs 2010 Page 9 High Order SD Modulator Design Procedure Establish requirements determine order Design noise transfer function NTF Determine loop filter H Synthesize filter Evaluate performance Establish stability criteria Node voltage scaling for maximum DR Effect of component non idealities Ref R W Adams and R Schreier Stability Theory for DS Modulators in Delta Sigma Data Converters S Norsworthy et al eds IEEE Press 1997 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 10 Example Modulator Specification Example Audio ADC Dynamic range Signal bandwidth Nyquist frequency Modulator order Oversampling ratio Sampling frequency DR B fN L M fs fN fs 18 Bits 20 kHz 44 1 kHz 5 64 2 822 MHz The order L and oversampling ratio M are chosen based on SQNR 120dB EECS 247 Lecture 25 Oversampled ADCs 2010 Page 11 Noise Transfer Function NTF z stop band attenuation Rstop 80dB L 5 L 5 Rstop 80 B 20000 b a cheby2 L Rstop B high NTF filt b a 20 NTF dB 0 Chebychev II filter chosen zeros in stop band 20 40 60 80 100 EECS 247 Lecture 25 Oversampled ADCs 104 Frequency Hz 106 2010 Page 12 Loop Filter Characteristics H z 100 80 Loopfilter H dB Y z 1 NTF E z 1 H z 1 H z 1 NTF 60 40 20 Note For order SD an integrator is used instead of the high order filter shown 1st 0 20 4 6 10 10 Frequency Hz EECS 247 Lecture 25 Oversampled ADCs 2010 Page 13 Modulator Topology Simulation Model Filter X b2 b1 I1 I2 I3 I4 K1 z 1 1 1 z K2 z 1 1 1 z K3 z 1 1 1 z K4 z 1 1 1 z I 1 a1 I 2 a2 I5 I 3 K5 z 1 1 1 z I 4 a4 a3 I 5 a5 Q DAC Gain Comparator g Y Ref 1 1 Nav Sooch Don Kerth Eric Swanson and Tetsuro Sugimoto Phase Equalization System for a Digital to Analog Converter Using Separate Digital and Analog Sections U S Patent 5061925 1990 figure 3 and table 1 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 14 Filter Coefficients a1 1 a2 1 2 a3 1 4 a4 1 8 a5 1 8 Ref k1 1 k2 1 k3 1 2 k4 1 4 k5 1 8 b1 1 1024 b2 1 16 1 64 g 1 Nav Sooch Don Kerth Eric Swanson and Tetsuro Sugimoto Phase Equalization System for a Digital to Analog Converter Using Separate Digital and Analog Sections U S Patent 5061925 1990 figure 3 and table 1 EECS 247 Lecture 25 Oversampled ADCs 2010 Page 15 Output Spectrum dBWN Int Noise dBFS 5th Order Noise Shaping AFE Simulation Results Notice tones around fs 2 40 20 Signal 0 20 Mostly quantization noise except at low frequencies 40 60 80 Let s zoom into the baseband portion 100 120 140 160 0 Output Spectrum Integrated Noise 20 averages 0 1 0 2 0 3 0 4 0 5 Frequency f fs EECS 247 Lecture 25 Oversampled ADCs 2010 Page 16 Output Spectrum dBWN Int Noise dBFS 5th …
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