EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 1EE247Lecture 24• Administrative– EE247 Final exam: • Date: Wed. Dec. 15th• Time: -12:30pm-3:30pm-• Location: 289 Cory• Closed book/course notes• No calculators/cell phones/PDAs/Computers• Bring one 8x11 paper with your own notes• Final exam covers the entire course materialEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 2EE247Lecture 24• Oversampled ADCs– 2ndorder Σ∆ modulator• Practical implementation– Effect of various nonidealities on the Σ∆performance• Higher order Σ∆ modulators– Cascaded modulators (multi-stage)– Single-loop single-quantizer modulators with multi-order filtering in the forward pathEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 3Oversampled ADCsLast Lecture• Oversampled ADCs– 1storder Σ∆ modulator• Quantization error • SQNR analysis• Limit cycle oscillation– 2ndorder Σ∆ modulator• Dynamic range • Practical implementation– Effect of various nonidealities on the Σ∆ performanceEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 42ndOrder Σ∆Effect of Integrator Finite DC GainVi-+φ1φ2aVoCsCI( )( )111111111idealFinitDCGainCszHzCIzazCsaCsCIHzCIazCsaCI−−−−=×−++=×+−++EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 52ndOrder Σ∆Effect of Integrator Finite DC Gain•Low integrator DC gain à degrades noise performance•If a>M (oversampling ratio) à Insignificant degradation in SNR•Normally DC gain designed to be >> M in order to suppress nonlinearitiesMax signal levelf0 /aaIntegrator magnitude responseEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 62ndOrder Σ∆Effect of Integrator Finite DC Gain•Simulation results•H0=a à finite DC gain• a> M à no degradation in SNRRef: B.E. Boser and B.A. Wooley, “The Design of Sigma-Delta Modulation A/D Converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298-1308, Dec. 1988.EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 72ndOrder Σ∆Effect of Integrator Overall Integrator Gain Inaccuracy• Gain of ½ in front of integrators is a function of C1/C2 of theintegrator •The effect of C1/C2 inaccuracy inspected by simulationEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 82ndOrder Σ∆Effect of Integrator Overall Gain Inaccuracy• Simulation show gain can vary by 20% w/o loss in performanceà Confirms insensitivity of Σ∆ to component variations•Note that for gain >0.65 system becomes unstable & SNR drops rapidlyRef: B.E. Boser and B.A. Wooley, “The Design of Sigma-Delta Modulation A/D Converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298-1308, Dec. 1988.EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 92ndOrder Σ∆Effect of Integrator NonlinearitiesRef: B.E. Boser and B.A. Wooley, “The Design of Sigma-Delta Modulation A/D Converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298-1308, Dec. 1988.EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 102ndOrder Σ∆Effect of Integrator NonlinearitiesRef: B.E. Boser and B.A. Wooley, “The Design of Sigma-Delta Modulation A/D Converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298-1308, Dec. 1988.• Simulation for single-ended topology•Even order nonlinearities can be significantly attenuated by using differential circuit topologiesEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 112ndOrder Σ∆Effect of Integrator NonlinearitiesRef: B.E. Boser and B.A. Wooley, “The Design of Sigma-Delta Modulation A/D Converters,” IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 1298-1308, Dec. 1988.• Simulation for single-ended topology•Odd order nonlinearities (3rdin this case)EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 122ndOrder Σ∆Effect of KT/C noise•For the example of digital audio with 16-bit (100dB) & M=256à Cs=1pF à 6µVrms noiseàIf FS=4Vp-p-dthen noise is -107dB à almost no degradation in overall SNRàCs=1pF, CI=2pF à small cap area compared to Nyquist ADC capsàSince thermal noise provides some level of dithering à better not choose much larger capacitors!Vi-+φ1φ2aVoCsCI22221/24/2Total in-band noise:42nnninputKTvCskTkTvfCsfsCsfskTvBCsfskTCsM==×=×=××=×EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 132ndOrder Σ∆Effect of Finite Opamp BandwidthInput/Output z-transformVi+Cs-+VoCIφ1φ2Vi-Unity-gain-freq.fu =1/τVoφ2T=1/fssettlingerrortimeAssumption-Opamp à does not slewOpamp has only one pole à exponential settlingEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 142ndOrder Σ∆Effect of Finite Opamp Bandwidthà Σ∆ does not require high opamp bandwidth fu> 2fsadequateEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 152ndOrder Σ∆Effect of Slew Limited Settlingφ1φ2Vo-realVo-idealClockSlewing Slewing EECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 162ndOrder Σ∆Effect of Slew Limited SettlingAssumption-Opamp settling à slew limitedàMinimum slew rate of 1.2 (∆ x fs) requiredàLow slew rate degrade SNR rapidlyEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 172ndOrder Σ∆Effect of Comparator Non-Idealities on SD Performance1-bit A/D à Single comparator•Speed must be adequate for the operating sampling rate•Input referred noise- same as offset•Input referred offset- feedback loop suppresses the effect àΣ∆ performance not sensitive to input referred offset•Hysteresis= Minimum overdrive required to change the outputEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 182ndOrder Σ∆Comparator HysteresisHysteresis= Minimum overdrive required to change the outputEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 192ndOrder Σ∆Comparator Hysteresisà Comparator hysteresis < ∆/40 does not affect SNRà E.g. ∆=1V, comparator hysteresis up to 25mV tolerableEECS 247 Lecture 24: Oversampling Data Converters © 2004 H. K. Page 20Design Phase Simulations• Design of oversampled ADCs requires simulation of extremely long data traces• SPICE type simulators normally used to test for gross circuit errors only • SPICE type simulators too
View Full Document
Unlocking...