EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 1EE247Lecture 16 D/A converters continued:– Current based DACs-unit element versus binary weighted– R-2R type DACs– Static performance• Component matching-systematic & random errors– Practical aspects of current-switched DACs– Segmented current-switched DACs– DAC self calibration techniques• Current copiers• Dynamic element matchingADC Converters– Sampling• Sampling switch induced distortion• Sampling switch charge injectionEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 2Summary Last LectureData Converters– Practical aspects of converter testing• Evaluation board considerations– D/A converter design• Architectures– Voltage based• Resistor string type• Resistor string incorporating interpolation– Charge based• Serial charge redistribution DAC• Parallel charge scaling DAC– Current based• Unit element • Binary weightedEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 3Current Source DACUnit Element• “Unit elements ”•2B-1 current sources & switches • Monotonicity does not depend on element matching• Suited for both MOS and BJT technologies• Output resistance of current source causes gain error IrefIrefIoutIrefIref…………………………EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 4Current Source DACUnit Element • Output resistance of current source Æ gain error problemÆ Use transresistance amplifier- Current source output held @ virtual ground - Error due to current source output resistance eliminated- New issues: offset & speed of the amplifierIrefIrefIrefIref…………………………VoutR-+EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 5Current Source DACBinary Weighted• “Binary weighted”• B current sources & switches (2B-1 unit current sources but less # of switches)• Monotonicity depends on element matching4 IrefIrefIout2Iref2B-1Iref…………………………EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 6R-2R Ladder Type DAC• R-2R DAC Basics– Simple R network divides both voltage & current by 2RVV/22R2RII/2I/2Increase # of bits by replicating circuitEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 7R-2R Ladder DACVB2R2REmitter-follower added to convert to high output impedance current sourcesÆ Series switch resistance does not impair performance2R2R2R2RRRRRVEEIoutEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 8R-2R Ladder DACHow Does it Work?VBConsider a simple 3bit R-2R DAC: 2R2R2R2RRRVEEIoutAunitAunit2Aunit4AunitEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 9R-2R Ladder DACHow Does it Work?VBSimple 3bit DAC:1- Consolidate first two stages: 2R2R2R2RRRVEEITI1I2I3AunitAunit2Aunit4AunitQTQ1Q2Q3VB2R2RRRRVEEI1+ITI2I32Aunit2Aunit4AunitQ2Q3EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 10R-2R Ladder DACHow Does it Work?Simple 3bit DAC-2- Consolidate next two stages:VB2R2RRRRVEEI1+ITI2I32Aunit2Aunit4AunitQ2Q3VB2RRRVEEI2+I1+ITI34Aunit4AunitQ2Q3Total Total Total321 3 2 1TIIIIIII I ,I ,I248=++→= = =EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 11R-2R Ladder DACHow Does it Work?VBConsider a simple 3bit R-2R DAC: 2R2R2R2RRRVEEII2I4I2I4IIoutAunitAunit2Aunit4AunitRef: B. Razavi, “Data Conversion System Design”, IEEE Press, 1995, page 84-87EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 12R-2R Ladder DACVB2R2RTransresistance amplifier added to:- Convert current to voltage- Generate virtual ground @ current summing node so that output impedance of current sources do not cause error- Issue: error due to opamp offsetVoutR-+2R2R2R2RRRRRVEEII2I4I8I16I2I4I8I16IRTotalEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 13R-2R Ladder DACOpamp Offset Issueout inos osTotalTotalout inos osTotalout inos osTotalTotaloutosR1VVRIf R large,VVIf R not largeR1VVRProblem:Since R is code dependant V would be code dependant Gives rise to INL & DNL⎛⎞+=⎜⎟⎝⎠=→==⎛⎞+→=⎜⎟⎝⎠→→VoutR-+RTotalosVOffset ModelEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 14R-2R LadderSummary• Advantages:– Resistor ratios only x2– Does not require precision capacitors• Disadvantages:– Total device emitter area Æ AEx2BÆ Not practical for high resolution DACs– INL/DNL error due to amplifier offsetEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 15Static DAC Errors -INL / DNLStatic DAC errors mainly due to component mismatch– Systematic errors• Contact resistance• Edge effects in capacitor arrays• Process gradients• Finite current source output resistance– Random variations• Lithography etc…• Often Gaussian distribution (central limit theorem)*Ref: C. Conroy et al, “Statistical Design Techniques for D/A Converters,” JSSCAug. 1989, pp. 1118-28.EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 16Current Source DACDNL/INL Due to Element Mismatch • Simplified example:– 3-bit DAC– Assume only two of the current sources mismatched (# 4 & #5)IrefIrefIrefIrefIrefIref +ΔIIref -ΔIVout-+EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 17maxsegment[m] V[LSB]DNL[m]V[LSB]segment[4] V[LSB]DNL[4]V[LSB](I I)R IRIRDNL[4] I / I [LSB](I I)R IRDNL[5]IRDNL[5] I / I[LSB]INL I / I [LSB]−=−=−Δ −==−Δ+Δ −==Δ→=−Δ000 001 010 011 100 101 110 111DigitalInputAnalog Output 7 IrefR654321xIrefR0Current Source DACDNL/INL Due to Element Mismatch EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 18Component MismatchProbability Distribution Function• Component parameters Æ Random variables• Each component is the product of many fabrication steps• Most fabrication steps includes random variationsÆOverall component variation product of several random variablesÆAssuming each of these variables have a uniform distribution:ÆJoint pdf of a random variable affected by two uniformly distribution is the convolution of the two uniform pdfs…….Æpdf [f(x1)]**pdf [f(x2)]pdf [f(x1,x2)]pdf [f(x1,x2)]pdf [f(x3,x4)]..……..pdf [f(xm,xn)]*ÆGaussian pdfEECS 247 Lecture 16: Data Converters © 2006 H.K. Page 19Gaussian Distribution-3 -2 -1 0 1 2 300.10.20.30.4x /σProbability density p(x)()22x2221p( x ) e2where standard deviation : E(X )μσπσσμ−−==−EECS 247 Lecture 16: Data Converters © 2006 H.K. Page 20Yield()2xX2XPXx X1edx2Xerf2π+−−−≤≤+ ==⎛⎞=⎜⎟⎝⎠∫00.10.20.30.4Probability density p(x)0 0.5 1 1.5 2 2.5
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