EECS 247 Lecture 7: Filters © 2006 H.K. Page 1EE247 Lecture 7• Summary last lecture• Automatic on-chip filter tuning (continued from last lecture)– Continuous tuning• Reference integrator locked to a reference frequency– Error due to integrator DC offset and cancellation method– DC tuning of resistive timing element– Periodic digitally assisted tuning• Systems where filter is followed by ADC & DSP, existing hardwarecan be used to periodically update filter freq. response• Continuous-time filters – High pass filters– Bandpass filters• Lowpass to bandpass transformation•Example: 6thorder bandpass filterEECS 247 Lecture 7: Filters © 2006 H.K. Page 2Summary last lecture• Continuous-time filters– Opamp MOSFET-C filters– Opamp MOSFET-RC filters– Gm-C filters• Frequency tuning for continuous-time filters– Trimming via fuses– Automatic on-chip filter tuning• Continuous tuning– Utilizing VCF built with replica integrators– Use of VCO built with replica integrators– Reference integrator locked to reference frequencyEECS 247 Lecture 7: Filters © 2006 H.K. Page 3Master-Slave Frequency TuningReference Integrator Locked to Reference FrequencytuneVGmCVin•Replica of main filter integrator e.g. Gm-C building block used •Utilizes the fact that a DC voltage source connected to the input of the Gm cell generates a constant current proportional to the transconductance and the voltage reference I = Gm.VrefReplica of main filter Gm-C VoutVrefI=Gm*VrefEECS 247 Lecture 7: Filters © 2006 H.K. Page 4Reference Integrator Locked to Reference FrequencyC1refVGmVTC1=× ×tuneVGmC1Vin•Consider the following sequence: Integrating capacitor is fully discharged @ t=0 At t=0 the capacitor is connected to the output of the Gm cell then:VoutVC1TVrefI=Gm*Vreft=0timeC1 C1refC1refQVC1GmV TVGmVTC1=×=× ×→=× ×clkCNTGm f==If VC1=Vrefthen:EECS 247 Lecture 7: Filters © 2006 H.K. Page 5Reference Integrator Locked to Reference FrequencyS2S1S3GmC1C2VrefA• Three clock phase operation • To analyze Æ study one phase at a timeReplica of main filter Gm Ref: A. Durham, J. Hughes, and W. Redman- White, “Circuit Architectures for High Linearity Monolithic Continuous-Time Filtering,” IEEE Transactions on Circuits and Systems, pp. 651-657, Sept. 1992.EECS 247 Lecture 7: Filters © 2006 H.K. Page 6Reference Integrator Locked to Reference Frequency P1 highÆ S1 closedS2S1S3GmC1C2VrefC1 Ædischarged ÆVC1=0C2Æretains its previous chargeAEECS 247 Lecture 7: Filters © 2006 H.K. Page 7Reference Integrator Locked to Reference FrequencyP2 high Æ S2 closedS2S3GmC1C2VrefAI=Gm*VrefP2VC1C1refVGmVT2C1=× ×T1T2C1 Æcharged with constant current: I=Gm*VrefC2Æretains its previous chargeEECS 247 Lecture 7: Filters © 2006 H.K. Page 8Reference Integrator Locked to Reference Frequency P3 high Æ S3 closedC1 charge shares with C2Few cycles following startup Assuming A is large, feedback forces:ΔV Æ0ÆVC2= VrefS2S3GmC1C2VrefAT1T2ΔVEECS 247 Lecture 7: Filters © 2006 H.K. Page 9Reference Integrator Locked to Reference Frequency P3 high Æ S3 closedS2S3GmC1C2VrefAC1 C2C1refrefrefVVVrefsince V Gm V T2C1then: V Gm V T2C1C1or: T2 N / fclkGm:===× ×=× ×==T1T2EECS 247 Lecture 7: Filters © 2006 H.K. Page 10SummaryReplica Integrator Locked to Reference FrequencyFeedback forces Gm to assume a value so that :S2S3GmC1C2VrefAintgintg0C1N/fclkGmorGmfclk/ NC1τω====• Integrator time constant locked to an accurate frequency• Tuning signal used to adjust the time constant of the main filter integratorsTuning SignalTo Main FilterEECS 247 Lecture 7: Filters © 2006 H.K. Page 11Issues1- Loop StabilityS2S3GmC1C2VrefA• Note: Need to pay attention to loop stability• C1 chosen to be smaller than C2 – tradeoff between stability and speed of look acquisition• Lowpass filter at the output of amp. A helps stabilize the loopTuning SignalTo Main FilterEECS 247 Lecture 7: Filters © 2006 H.K. Page 12Issues2-GM-Cell DC Offset Induced ErrorProblems to be aware of:Æ Tuning error due to master integrator DC offsetS2S3GmC1C2VrefATo MainFilterintg0Gmfclk/NC1ω==EECS 247 Lecture 7: Filters © 2006 H.K. Page 13Issues Gm Cell DC OffsetWhat is DC offset?Simple example: For the differential pair shown here, mismatch in input device or load characteristics would cause DC offset:ÆVo = 0 requires a non-zero input voltageOffset could be modeled as a small DC voltage source at the input for which with shorted inputsÆ Vo = 0Example: Differential PairoVinV-++-M1 M2VosVtuneEECS 247 Lecture 7: Filters © 2006 H.K. Page 14Simple Gm-Cell DC Offset()()()M1,2os ov1,2th1 th2M1,2WL1VVVVW2LΔ=−−Mismatch associated with M1 & M2 Æ DC offsetAssuming offset due to load device mismatch is negligibleoVinV-++-M1 M2VosVtuneRef: Gray, Hurst, Lewis, Meyer, Analysis & Design of Analog Integrated Circuits, Wiley 2001, page 335EECS 247 Lecture 7: Filters © 2006 H.K. Page 15Gm-Cell Offset Induced Error()C1 C2C1refC1 osrefosrefVVVrefIdeal V Gm V T2C1with offset: V Gm V V T2C1VC1or: T2 1GmV:===× ×=× − ×⎛⎞⎜⎟=−⎜⎟⎝⎠VrefVosS2S3GmC1C2AI=Gm(Vref - Vos)•Effect of Gm-cell DC offset: Voltage sourcerepresenting DC offsetEECS 247 Lecture 7: Filters © 2006 H.K. Page 16Gm-Cell Offset Induced ErroroscriticalrefosrefVC1 GmT2 1 fGm C1VVfor 1/10V10% error in tuning!⎛⎞⎜⎟=− ∝⎜⎟⎝⎠=VrefVosS2S3GmC1C2AI=Gm(Vref-Vos)•Example:EECS 247 Lecture 7: Filters © 2006 H.K. Page 17Gm-Cell Offset Induced ErrorSolutionint gC•Assume differential integrator•Add a pair of auxiliary inputs to the input stage for offset cancellation purposesoVmaininV+-+-M1 M2M3M4-+aux.inV+--++-MainInputAux.InputEECS 247 Lecture 7: Filters © 2006 H.K. Page 18Simple Gm-Cell AC Small Signal Model in1 in2M1 M3gV gVmmin1 in2M1 M3gV gVmmintg2CM1oVAC half circuitintg2CoVCGS1Small signal modelorVin1Vin1()M1oooomin1int gM1M1mooin1moint g oM1moin1 oin1int gint gM1m1r||V r is parallel combination of r of M1 & current sourcegVs2CgrV V & g r a1 Integrator finite DC gain1s2C ra1 gVVNote:a1,VVa1 s 2Cs2C1g⎛⎞=⎜⎟×⎝⎠−==→+×−−=→∞=×××+gM1Vin1EECS 247 Lecture 7: Filters © 2006 H.K. Page 19Simple Gm-Cell + Auxiliary InputsAC Small Signal Modelin1 in2M1 M3gV gVmmin1 in2M1 M3gV gVmmintg2CM1oVAC half circuitM3intg2CoVCGS1Small signal modelorVin1Vin2CGS3Vin1Vin2()M1 M3oooomin1 min2int gM1 M3mo mooin1in2int g o int g ooin1in2intg intgM1 M3mm1r||V r
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