Physical Design FlowImagine …What are some of your considerations?Routing ApplicationsRouting AlgorithmsBasic Rules of Routing - 1Basic Rules of Routing – Part 2Basic Rules of Routing – Part 3Taxonomy of VLSI RoutersToday’s high-perf logical/physical flowTop-down problems in the flowIteration problems in the flowECE 260B – CSE 241A /UCB EECS 244 1Kahng/Keutzer/NewtonPhysical Design FlowRead NetlistInitial PlacementPlacementImprovementCost EstimationRouting RegionDefinitionGlobal RoutingInputPlacementRoutingOutputCompaction/clean-upRouting RegionOrderingDetailed RoutingCost EstimationRoutingImprovementWrite Layout DatabaseFloorplanningFloorplanningCourtesy K. Keutzer et al. UCBECE 260B – CSE 241A /UCB EECS 244 2Kahng/Keutzer/NewtonImagine …You have to plan transportation (i.e. roads and highways) for a new city the size of ChicagoMany dwellings need direct roads that can’t be used by anyone else You can affect the layout of houses and neighborhoods but the architects and planners will complainAnd … you’re told that the time along any path can’t be longer than a fixed amountWhat are some of your considerations?ECE 260B – CSE 241A /UCB EECS 244 3Kahng/Keutzer/NewtonWhat are some of your considerations? How many levels do my roads need to go? Remember: Higher is more expensive. How do I avoid congestion? What basic structure do I want for my roads?Manhattan?Chicago?Boston?Automated route tools have to solve problems of comparable complexity on every leading edge chipECE 260B – CSE 241A /UCB EECS 244 4Kahng/Keutzer/NewtonRouting Applications Block-basedBlock-basedMixedCell and BlockMixedCell and Block Cell-basedCell-basedECE 260B – CSE 241A /UCB EECS 244 5Kahng/Keutzer/NewtonRouting AlgorithmsHard to tackle high-level issues like congestion and wire-planning and low level details of pin-connection at the same timeGlobal routingIdentify routing resources to be usedIdentify layers (and tracks) to be usedAssign particular nets to these resourcesAlso used in floorplanning and placementDetail routingActually define pin-to-pin connectionsMust understand most or all design rulesMay use a compactor to optimize resultNecessary in all applicationsECE 260B – CSE 241A /UCB EECS 244 6Kahng/Keutzer/NewtonBasic Rules of Routing - 1Photo courtesy:Jan M. RabaeyAnantha ChandrakasanBorivoje Nikolic Wiring/routing performed in layers – 5-9 (-11), typically only in “Manhattan” N/S E/W directionsE.g. layer 1 – N/SLayer 2 – E/W A segment cannot cross another segment on the same wiring layer Wire segments can cross wires on other layers Power and ground may have their own layersECE 260B – CSE 241A /UCB EECS 244 7Kahng/Keutzer/NewtonBasic Rules of Routing – Part 2 Routing can be on a fixed grid –Case 1: Detailed routing only in channelsWiring can only go over a row of cells when there is a free track – can be inserted with a “feedthrough”Design may use of metal-1, metal-2Cells must bring signals (i.e. inputs, outputs) out to the channel through “ports” or “pins”ECE 260B – CSE 241A /UCB EECS 244 8Kahng/Keutzer/NewtonBasic Rules of Routing – Part 3 Routing can be on a fixed or gridless (aka area routing) Case 1: Detailed routing over cellsWiring can go over cellsDesign of cells must try to minimize obstacles to routing – I.e. minimize use of metal-1, metal-2Cells do not need to bring signals (i.e. inputs, outputs) out to the channel – the route will come to themECE 260B – CSE 241A /UCB EECS 244 9Kahng/Keutzer/NewtonTaxonomy of VLSI RoutersGraph SearchSteinerIterativeHierarchical Greedy Left-EdgeRiverSwitchboxChannelMazeLine ProbeLine ExpansionRestricted General PurposePower & GroundClockGlobal Detailed SpecializedRoutersCourtesy K. Keutzer et al. UCBECE 260B – CSE 241A /UCB EECS 244 10Kahng/Keutzer/NewtonToday’s high-perf logical/physical flow1) optimize using estimated or extracted capacitances2) re-place and re-route3)if design fails to meet constraints due to poor estimation - repeat 1 +2- netlistLibraryuser constraintslayoutRCextractiondelaymodelgeneratorroutingtechfilesplacementlogicoptimization/timing verifSDFcell/wiredelaysECE 260B – CSE 241A /UCB EECS 244 11Kahng/Keutzer/NewtonTop-down problems in the flownetlistLibraryuser constraintslayoutRCextractiondelaymodelgeneratorroutingtechfilesplacementlogicoptimization/timing verifSDFcell/wiredelaysinitial capacitance estimates inaccurateinability to take top-down timing constraintsinaccurate internal timing modelECE 260B – CSE 241A /UCB EECS 244 12Kahng/Keutzer/NewtonIteration problems in the flownetlistLibraryuser constraintslayoutRCextractiondelaymodelgeneratorroutingtechfilesplacementlogicoptimization/timing verifSDFcell/wiredelays updated capacitances cause significant changes in optimizationlimited-incremental capabilityresulting iteration may not bring closer to
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