Slide 1Chip costs are exploding because of design complexityCommon quotesThrough the early 1980s:… less than world classNew mind set: Design affects everything!New semantics for expressing behavior to reduce design complexityRTL has poor semantics for compositionBluespec promotes composition through guarded interfacesIn Bluespec SystemVerilog (BSV) …Bluespec: State and Rules organized into modulesExamplesProgramming with rules: A simple exampleGCD in BSVGCD Hardware ModuleGCD: Another implementationBluespec Tool flowGenerated Verilog RTL: GCDGenerated HardwareGenerated Hardware ModuleGCD: A Simple Test BenchGCD: Test BenchGCD: Synthesis resultsMultiplier ExampleMultiplier in BluespecExploring microarchitecturesIP Lookup block in a routerSparse tree representationSW (“C”) version of LPMLongest Prefix Match for IP lookup: 3 possible implementation architecturesStatic PipelineStatic codeCircular pipelineCircular Pipeline codeSynthesis resultsNext TimeFebruary 24, 2006 http://csg.csail.mit.edu/6.375/ L07-1Bluespec-1: Design Affects EverythingArvind Computer Science & Artificial Intelligence LabMassachusetts Institute of TechnologyFebruary 24, 2006 L07-2http://csg.csail.mit.edu/6.375/Chip costs are explodingbecause of design complexityDesign and verification dominate escalating project costsSource: Aart de Geus, CEO of SynopsysBased on a survey of 2000 users by SynopsysSoC failures costing time/spinsSource: IBM/IBS, Inc.ArchitectureVerificationPhysicalValidationPrototypeFebruary 24, 2006 L07-3http://csg.csail.mit.edu/6.375/Common quotes“Design is not a problem; design is easy”Almost complete reliance on post-design verification for qualityMind set“Verification is a problem”“Timing closure is a problem”“Physical design is a problem”February 24, 2006 L07-4http://csg.csail.mit.edu/6.375/The U.S. auto industry Sought quality solely through post-build inspection Planned for defects and reworkand U.S. quality was…Through the early 1980s:DefectMake Inspect ReworkDefectDefectFebruary 24, 2006 L07-5http://csg.csail.mit.edu/6.375/… less than world classAdding quality inspectors (“verification engineers”) and giving them better tools, was not the solutionThe Japanese auto industry showed the way“Zero defect” manufacturingFebruary 24, 2006 L07-6http://csg.csail.mit.edu/6.375/New mind set:Design affects everything!A good design methodologyCan keep up with changing specsPermits architectural explorationFacilitates verification and debuggingEases changes for timing closureEases changes for physical designPromotes reuseDesign for Correctness It is essential toFebruary 24, 2006 L07-7http://csg.csail.mit.edu/6.375/New semantics for expressing behavior to reduce design complexity Decentralize complexity: Rule-based specifications (Guarded Atomic Actions)Let us think about one rule at a timeFormalize composition: Modules with guarded interfacesAutomatically manage and ensure the correctness of connectivity, i.e., correct-by-construction methodologyRetain resilience to changes in design or layout, e.g. compute latency ’sPromote regularity of layout at macro levelBluespecFebruary 24, 2006 L07-8http://csg.csail.mit.edu/6.375/data_inpush_req_npop_req_nclkrstndata_outfullemptyRTL has poor semantics for compositionExample: Commercially available FIFO IP blockThese constraints are spread over many pages of the documentation...No machine verification of such informal constraints is feasibleFebruary 24, 2006 L07-9http://csg.csail.mit.edu/6.375/Bluespec promotes compositionthrough guarded interfacesnot fullnot emptynot emptynnrdyenabrdyenabrdyenqdeqfirstFIFOtheModuleAtheModuleBtheFifo.enq(value1);theFifo.deq();value2 = theFifo.first();theFifo.enq(value3);theFifo.deq();value4 = theFifo.first();theFifoEnqueue arbitration controlDequeue arbitration controlSelf-documenting interfaces; Automatic generation of logic to eliminate conflicts in use.February 24, 2006 L07-10http://csg.csail.mit.edu/6.375/In Bluespec SystemVerilog (BSV) …Power to express complex static structures and constraintsChecked by the compiler“Micro-protocols” are managed by the compilerThe compiler generates the necessary hardware (muxing and control)Micro-protocols need less or no verificationEasier to make changes while preserving correctness Smaller, simpler, clearer, more correct codeFebruary 24, 2006 L07-11http://csg.csail.mit.edu/6.375/Bluespec: State and Rules organized into modulesAll state (e.g., Registers, FIFOs, RAMs, ...) is explicit.Behavior is expressed in terms of atomic actions on the state: Rule: condition action Rules can manipulate state in other modules only via their interfaces.interfacemoduleFebruary 24, 2006 L07-12http://csg.csail.mit.edu/6.375/ExamplesGCDMultiplicationIP LookupFebruary 24, 2006 L07-13http://csg.csail.mit.edu/6.375/Programming withrules: A simple exampleEuclid’s algorithm for computing the Greatest Common Divisor (GCD):15 6 9 6 subtract 3 6 subtract 6 3 swap 3 3 subtract 0 3 subtractanswer:February 24, 2006 L07-14http://csg.csail.mit.edu/6.375/module mkGCD (I_GCD); Reg#(int) x <- mkRegU; Reg#(int) y <- mkReg(0); rule swap ((x > y) && (y != 0)); x <= y; y <= x; endrule rule subtract ((x <= y) && (y != 0)); y <= y – x; endrule method Action start(int a, int b) if (y==0);x <= a; y <= b; endmethod method int result() if (y==0); return x; endmethodendmoduleInternalbehaviorGCD in BSVExternalinterfaceStatetypedef int Int#(32)Assumes x /= 0 and y /= 0xyswap subFebruary 24, 2006 L07-15http://csg.csail.mit.edu/6.375/rdyenabintintrdystartresultGCDmoduleinty == 0y == 0implicit conditionsinterface I_GCD; method Action start (int a, int b); method int result();endinterfaceGCD Hardware Modulet#(type t)ttt ttIn a GCD call t could beInt#(32),UInt#(16),Int#(13), ...The module can easily be made polymorphicMany different implementations can provide the same interface: module mkGCD (I_GCD)February 24, 2006 L07-16http://csg.csail.mit.edu/6.375/module mkGCD (I_GCD); Reg#(int) x <- mkRegU; Reg#(int) y <- mkReg(0); rule swapANDsub ((x > y) && (y != 0)); x <= y; y <= x - y; endrule rule subtract ((x<=y) && (y!=0)); y <= y – x; endrule method Action start(int a, int b) if (y==0);x <= a; y <= b; endmethod method int result() if (y==0); return x; endmethodendmoduleGCD: Another implementationCombine swap and subtract ruleDoes it compute faster ?February 24, 2006
View Full Document
Unlocking...