Lab Report 1 Table of Contents 1. Profiles & Layout (14 Points) 2. Process Procedures (20 points) 3. Calculations (36 Points) 4. Questions (30 Points) 5. Bonus Questions (10 Points) Total Points = 110 possible (graded out of 100) Please be sure to include the requirement signature regarding academic honesty. All lab group members should print out this page, sign on the attached form, and include it with your Lab Report. Thank you! REPORTS MUST BE WORD PROCESSED (EXCEPT FOR SKETCHES AND HAND WRITTEN CALCULATIONS) Each group of students will submit one joint report. There will be a 20 PAGE max limit on the report. Profiles & Layout and Calculations do not count towards this page limit. FOLLOW THE ATTACHED TEMPLATE FORMAT FOR THE REPORT. STUDENTS NOT FOLLOWING THIS FORMAT WILL BE DEDUCTED 10% PER SECTION DEVIATING FROM TEMPLATE. When possible, be concise and use structured bullet points! Due Date: Tuesday, April 22nd 2007, 3:45pm in class. Please also submit an electronic copy to your TA by the same deadline. There is a 10pt Deduction for Late Reports Per day.I. Profiles & Layout (14 Points) Draw cross-sectional profiles of a MOSFET (test structure 8) after each of the steps: W1: Staring Wafer W2: Field Oxidation W3: ACTV Photolithography and Etch W4: Gate Oxidation W5: Polysilicon CVD W6: POLY Lithography and Etch, Source/Drain Clear W7a: Spin-on Glass + Source/Drain Pre-diffusion W7b: Source/Drain Drive-in + Intermediate Oxidation W8: CONT Photolithography and Etch W9: Aluminum Evaporation W10: METL Photolithography + Etch Indicate all layers. Label each feature and indicate thicknesses (make roughly proportional sketches). Illustrate and describe important details: • non-planar interfaces from thermal oxidation • isotropic etch profiles • point-source Al evaporation • thermal oxidation growth These drawings should have significantly more detail than those on the lab manual website. See the diagram below for the exact cross-sections in question. (5 Points) B. Draw top views of the same thin-oxide MOSFET (test structure 8) after each of the four photolithography steps. [ACTV, POLY, CONT, METL] (4 Points)II. Process Procedures (20 Points) [Refer to Template at the back of the Report] A. Describe monitoring measurements that were done during processing: Film color Line Width Thickness Resistivity Vernier Determine whether each layer was overetched or underetched? Did you purposely over/underetch? Why? Include a table of your misalignments for each layer. Describe how the verniers are used to measure misalignment. Using diagrams may help. Were any layers misaligned intentionally? For each pair of verniers (ACTV-POLY, ACTV-CONT, POLY-CONT, CONT-METL), describe how far the marks may be misaligned in terms of device function. (6 Points) B. List and concisely describe the possible problems that could have occurred during the batch fabrication steps: W2: Field Oxidation W4: Gate Oxidation W5: Poly Deposition W7a: Source-Drain Prediffusion W7b: Drive-In & Intermediate Oxidation W9: Aluminum Evaporation W10: Sintering What were the sources of the problems, and how could you avoid them? How do you expect these deviations to affect the performance/function and cross-section of the device? List the types of monitoring measurements from Part A taken during each step (7 Points) C. Other than the problems that occurred during the batch sessions, what were the particular problems (or deviations from other groups) that could occur in YOUR wafer? Specifically these are the steps where all wafers were run in individually. W3: ACTV Photolithography W6: POLY Photolithography W7: SOG Deposition & SOG Strip W8: CONT Photolithography W10: METL PhotolithographyWhat were the causes and how were the problems overcome? How would these affect device performance? Include any illustrations that would be helpful. List the types of measurements from Part A taken during each step (7 Points)III. Calculations (36 Points) [Refer to Report Template at Back of Report] Fill the template table with the following parameters from your own wafer: (3 points) a) Film thickness (each layer) b) Sheet Resistance (after ion implantation and S&D formation) c) % over/underetch measured photoresist from theoretical (each layer) Calculate the parameters asked for in the following questions—list both the theoretical values and the empirical values, when applicable. We would like to see that you understand what processing abnormalities may have led to a discrepancy between the two. Neatly write up and annotate all calculations and attach in appendix. (Points will be deducted if we can not understand what you wrote). 1. Theoretical and experimental thicknesses of field oxide, gate and intermediate oxides (Include orientation dependence of oxidation rate but not impurity dependence) (10 points) 2. Junction depths after pre-diffusion and drive-in (theoretical, assume only phosphorous doping with surface concentration limited by solid solubility). You must consider the effect of the initial ion implantation. For pre-deposition you may use the box approximation, but for drive-in you must use the half-gaussian calculation. Why is this? (10 points) 3. Final surface concentrations of dopants, as determined from Irvin’s curves using sheet resistance measurements made in lab. (2 points) 4. Plot or sketch the change of dopant profile from the silicon surface through the source-drain after each thermal step. • Field Oxidation • Gate Oxidation • Poly-Deposition • Pre-Deposition • Drive-In & Intermediate Oxidation. • Sintering Quantitatively label significant points such as Peak concentration, Peak Width, Junction Depth. Show movement of the Silicon-Silicon Dioxide interface and qualitatively show non-ideal effects such as dopant redistribution during oxidation. (12 points) 5. Lateral diffusion under the MOSFET gates. You may estimate. Justify estimation. (Theoretical). (2 points)IV. Questions (30 Points – 2.5 points each) (3 Page Limit) Answer these questions in the most concise manner possible. A few lines should suffice for each. 1. What type of photoresist (positive or negative? I-line or G-line?) do we use in the lab? What do I-line and G-line refer to? Briefly describe how the resist responds to the process steps like spinning, UV light exposure and development. 2. What is the purpose of baking the wafers at 120 °C before
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