1Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Crystal PullingCrystal IngotsShaping and Polishing300 mm waferCzochralski Crystal Growth2Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Advantage of larger diameter wafersChip area largerWafer arealarger3Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Large-Diameter Wafer HandlingLa Vals Fab300mm wafer vs pizzaProduction FabOverhead rail transport of wafer cassette•Lateral uniformity of processing effects across the WHOLE waferis key consideration for microfabrication design4Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Microstructure of Electronic MaterialsAmorphousmaterialsSingle-CrystalMaterial5Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05glass platePhotolithographyPositive ResistPart exposed to light will be dissolved in development solution.chromiumProcessing TemperatureAmbient6Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05EtchingIsotropic(e.g. Wet Etching)Anisotropic(e.g. Reactive Ion Etching)Processing TemperatureAmbient Pattern resist maskEtching thin filmEtching completedRemove resist mask7Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05SiO2SisolutionHFSiEtching SelectivityExample: HF solution etches SiO2but not Si* A high etching selectivity is usually desired8Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05“Anisotropic “ Wet Etching of Si CrystalsEtchants : KOH or EDP (Ethylene-Diamine_Pyrocatechol)Top viewCross-sectionEffect of differentmask openingEtching stopsEtching continues(100) Si substrate9Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Thermal Oxidation•O2(or H2O) diffuses through SiO2and reacts with Si at the interface to form more SiO2.•1µm of SiO2 formed consumes 0.44 µm of Si substrate.• Thin oxide growth (e.g. gate oxide) -use O2. Dry oxidation• Thick oxide growth (e.g. field oxide) - use H2O. Wet oxidationOxide (Xox)thicknessOxidation time(t)t←∝t∝Si + O2→ SiO2Si + 2 H2O → SiO2+ 2H2Processing Temperature900-1100 oC10Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Uneven surface topography with window oxidationSiSi1stoxidation2ndoxidationSiPattern oxide windowby litho and etchSiO2SiNote uneven Si surfaceafter window oxidationSiO2SiSiO2SiO2Realistic topographywith 2-dimensional effect11Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Thermal OxidizationnitrideSiSi3N4O2Sipad oxide~100 Asilicon nitrideLocal Oxidation“LOCOSProcess”SiO212Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Ion ImplantationIon Energy~1 keV to200 keVProcessing TemperatureRoom temp duringimplantation.After implantation,a 900oC-1000oCanneal step is needed to:1) activate dopants2) restore Si crystallinitytypically used to introduce dopans into semiconductors13Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Diffusion()↑↑===⋅=−TasDKinTempTEnergyActivationQConstantDiffusionDeDDkTQ0• To introduce dopants into semiconductors [ Predeposition]• To spread out the dopant profile [ Drive-in]Processing Temperature950-1200 oC14Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Predeposition• Si surface concentration maintained at constant Cs(solid-solubility) during predep.• Dose of dopant incorporation = πDtCs2⋅15Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Predeposition and Drive-in•Half-gaussian depth profile after long drive-in.•Dopant dose conserved during drive-in.•Diffusion distance()Dt≅Predep onlyPredep +Drive-inConcentration versus Depth16Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Evaporation DepositionSi SubstrateSubstrate at ~ room tempDeposited Al film(polycrystalline)(Tsource>>Tboiling of Al , 700OC)evaporation Al chargePhysical Vapor Deposition (1)17Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Sputtering DepositionSi SubstrateAr+Al targetAr ionswith ~ keV kinetic energyAl atoms ejected due to Ar ion bombardmentPhysical Vapor Deposition (2)Deposited Al film(polycrystalline)Substrate at ~ room temp18Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Chemical Vapor Deposition (CVD)Processing Temperature300-600oC19Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Epitaxial Growth• Requires an ultra-clean Si surface prior to epi growth.• Requires deposition of Si at very high temperature for perfect crystallinity.Processing Temperature950-1150oC20Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Epitaxial GrowthTypically used when we need a lightly doped single-crystal Si layer on top of heavily doped substrate.<Si> substrate<Si> substrate<Si> Epi layern+<Si> e.g. 1020/cm3n-<Si>1015/cm3Example1) In-situ surface cleaning2) Si CVD at high temperature21Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05$944,4921812 sq/ft House Menlo Park, CA200mm Si wafer$80Cost of Silicon Real Estate$0.25 /cm2$ 0.44 /cm2$0.56 /cm2$140200mm Epi wafer22Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Wafer is polished using a slurry containing• silica abrasives (10-90 nm particle size)• etching agents (e.g. dilute HF)Chemical Mechanical Polishing (CMP)• Backing film provides elasticity between carrier and wafer• Polishing pad made of polyurethane, with 1 µm perforations– rough surface to hold slurryAmbientTemperature23Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Metal Plating~ ambient temp24Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05List of Conventional Microfabrication Modules – Lithography– Thermal Oxidation– Etching (Chemical , Plasma)– Ion Implantation– Diffusion – Physical Vapor Deposition PVD– Chemical Vapor Deposition CVD and EpitaxialGrowth– Chemical Mechanical Polishing CMP– Metal Plating25Professor N Cheung, U.C. BerkeleyLecture 2EE143 F050200400600800100012001400Resist ExposureResist Spin-onResist BakeEvaporation DepositionSputtering DepositionCVDIon ImplantationPost Implantation AnnealThermal OxidationDopant DiffusionEpiProcess Temperature in CResistReflowAl-Si Eutectic (560C)Si MeltingPoint (1412C)Processing Temperature and Material Failure Temperature26Professor N Cheung, U.C. BerkeleyLecture 2EE143 F05Williams, E. D., Ayres, R. U. & Heller, M. The 1-7 kilogram microchip: energy and material use in the production of semiconductor devices. Environmental Science and Technology, Published online (2002).Interesting Facts about Chip Manufacturing• A typical 2-gram silicon chip requires 1.6 kilograms of fossil fuel, 72 grams of chemicals and 32 kilograms of water to manufacture.• To make the high-grade silicon needed for the chips requires 160
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