6.012 Spring 2007 Lecture 19 1Lecture 19Transistor Amplifiers (I)Common-Source AmplifierOutline• Amplifier fundamentals• Common-source amplifier• Common-source amplifier with current-source supplyReading Assignment:Howe and Sodini; Chapter 8, Sections 8.1-8.4Announcement:Quiz #2: April 25, 7:30-9:30 PM at Walker. Calculator Required. Open book.6.012 Spring 2007 Lecture 19 2Amplifier Fundamentals• Source resistance RSis associated only with small signal sources• Choose ID= ISUP---> DC output current –IOUT= 0–VOUT= 0+−+−vsisRSvIN = VBIAS + vs iIN = IBIAS + is VBIASIBIASRSVoltage InputCurrent InputSupplyCurrent ISUPInputsourcesIntrinsicAmplifierActive DeviceiD = f(input) ISUPRLiOUT = idiD+−V−V+InputLoadvOUT6.012 Spring 2007 Lecture 19 32. Common-Source Amplifier:•VBIAS, RDand W/L of MOSFET selected to bias transistor in saturation and obtain desired output bias point (i.e. VOUT= 0).Consider the following circuit:• Consider intrinsic voltage amplifier - no loading•RS= 0•RL---> ∞•VGS= VBIAS-VSSWatch notation: vOUT(t)=VOUT+vout(t)vsVBIASvOUTV+=VDDV-=VSSiRiDRDRSRLsignal source+-signalload6.012 Spring 2007 Lecture 19 4• Bias point calculation;• Limits to signal swing• Small-signal gain;• Frequency response [in a few days] Want:Transfer characteristics of amplifier:Load line view of amplifier:VOUTVGG-VSS0VDD-VSSVTVDDVSSVOUTVGG-VSS=VDD-VSSVGG-VSSVGG-VSS=VT0IR=IDVSSVDDVDD-VSSRDload lineVBIAS-Vss= VDD-VSSVBIAS-VssVBIAS-Vss= VTVBIAS-Vss6.012 Spring 2007 Lecture 19 5Bias point: choice of VBIAS, W/L, and RDto keep transistor in saturation and to get proper quiescent VOUT.If we select VOUT=0:Assume MOSFET is in saturation:Then:Equation that allows us to compute needed VBIASgiven RDand W/L.ID=W2LµnCoxVBIAS− VSS− VT()2IR=VDD−VOUTRDID= IR=W2 LµnCoxVBIAS− VSS− VT()2=VDDRDVBIAS=2IDWLµnCox+ VSS+ VT6.012 Spring 2007 Lecture 19 6Signal swing:• Upswing: limited by MOSFET going into cut-off.vout,max=VDD• Downswing: limited by MOSFET leaving saturation.VDS,sat= VGS− VT=2IDWLµnCoxorThen:vout,min− VSS=VBIAS−VSS− VTvout,min=VBIAS−VTvsVBIASvOUTVDDVSSRDRSsignal source+-6.012 Spring 2007 Lecture 19 7Generic view of the effect of loading on small-signal operationTwo-port network view of small-signal equivalent circuit model of a voltage amplifier:Rinis input resistanceRoutis output resistanceAvois unloaded voltage gainVoltage divider at input:Voltage divider at output:Loaded voltage gain:vin= RinvsRin+ Rsvout= RLAvovinRout+ RLvoutvs=RinRin+ RSAvoRLRL+ Rout+-vin+-voutAvovinRout+-RinRsvs+-RLunloaded circuitoutputloadinginputloading6.012 Spring 2007 Lecture 19 8Small-signal voltage gain Avo: draw small-signal equivalent circuit model: Remove RLand RSThen unloaded voltage gain:Avo=voutvt=−gmro// RD()vout=−gmvtro// RD()GSD+-vt+-vgs+-voutgmvgsroRD+-vt+-voutgmvt(ro//RD)6.012 Spring 2007 Lecture 19 9Input Resistance• Calculation of input resistance, Rin:– Load amplifier with RL– Apply test voltage (or current) at input, measure test current (or voltage).For common-source amplifier:No effect of loading at input.it= 0 ⇒ Rin=vtit=∞++--vgsvtitgmvgs(ro//RD)RL6.012 Spring 2007 Lecture 19 10Output Resistance• Calculation of output resistance, Rout:– Load amplifier with RS– Apply test voltage (or current) at output, measure test current (or voltage).– Set input source equal zeroFor common-source amplifier:vgs= 0 ⇒ gmvgs=0 ⇒ vt=itro// RD()Rout=vtit= ro// RD++--vgsvtitgmvgs(ro//RD)RS6.012 Spring 2007 Lecture 19 11Two-port network view of common-source amplifierVoltage Amplifier voutvs=RinRin+ RSAvoRLRL+ Routvoutvs=−gmro// RD()RLRL+ ro// RD=−gmro// RD// RL()+-vin+-voutAvovinRout+-RinRsvs+-RLIntrinsic circuitoutputloadinginputloading6.012 Spring 2007 Lecture 19 12Current Source Supply •iSUP= 0 for vSUP≤ 0 •iSUP= ISUP+ vSUP/ roc for vSUP> 0 • High small-signal resistance roc.Equivalent circuit models :I—V characteristics of current source:iSUPISUPvSUP1rocvSUPiSUP+_ISUProciSUPvSUP+_roclarge-signal model small-signal model6.012 Spring 2007 Lecture 19 133. Common-source amplifier with current-source supplyvsVBIASvOUTVDDVSSiSUPiDRSRLsignal source+-signalloadLoadline ViewVOUTVBIAS-VSS=VDD-VSSVBIAS-VSSVBIAS-VSS=VT0iSUP=IDVDDload lineISUPVSS6.012 Spring 2007 Lecture 19 14ISUP= IDn=W2L⎛ ⎝ ⎜ ⎞ ⎠ ⎟ nµnCoxVBIAS− VSS− VTn()2VBvsVBIASvOUTVDDVSSiDiSUPRSsignal sourceUse PMOS for current source supplyISUP=−IDp=W2L⎛ ⎝ ⎜ ⎞ ⎠ ⎟ pµpCoxVDD− VB+ VTp()2VBIAS=2ISUPWL⎛ ⎝ ⎜ ⎞ ⎠ ⎟ nµnCox+ VSS+ VTBias point: Assume both transistors in saturationVOUT= 0. Choose ISUPand determine VB.Set -IDp= IDnfor VOUT~ 06.012 Spring 2007 Lecture 19 15Signal swing:• Upswing: limited by PMOS leaving saturation.• Downswing: limited by NMOS leaving saturation.• Same result as with resistive supply current.VSD,sat= VSG+ VTp=VDD−VB+ VTpVDD− vout,max=VDD−VB+VTpvout,max= VB− VTpvout,min=VBIAS−VTVBvsVBIASvOUTVDDVSSiDiSUPRSsignal source6.012 Spring 2007 Lecture 19 163. Common-source amplifier with current-source supply (contd.)Current source characterized by high output resistance:roc. Significantly higher than amplifier with resistive supply.p-channel MOSFET: roc= 1/λIDp• Voltage gain: Avo= -gm(ro//roc).• Input resistance :Rin= ∞• Output resistance: Rout= ro//roc.VBvsVBIASvOUTVDDVSSiDiSUPRSsignal source6.012 Spring 2007 Lecture 19 17Relationship between circuit figures of merit and device parametersCS amplifier with current source supply is a good voltage amplifier (Rinhigh and |Avo| high), but Routhigh too ⇒ voltage gain degraded if RL<< ro//roc.Remember:gm= 2IDWLµnCoxro≈1λnID∝LIDThen:Circuit Parameters|Avo|RinRoutDevice*Parametersgm(ro//roc)∝ro//rocISUP ↑↓-↓W ↑↑--L ↑↑-↑* adjustments are made to VBIAS so that none ofthe other parameterschange6.012 Spring 2007 Lecture 19 18What did we learn today?Summary of Key Conceptsfor CS amplifier• Bias Calculations• Signal Swing• Small Signal Circuit Parameters– Voltage Gain - AVO– Input Resistance - Rin– Output Resistance - Rout• Relationship between small signal circuit and device
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