Notes: 1. Unless otherwise indicated, you should assume room temperature and that kT/q is0.025 V. You should also approximate [(kT/q) ln 10] as 0.06 V. 2. Closed book; three sheets (6 pages) of notes permitted. 3. All of your answers and any relevant work must appear on these pages. Any additional paper you hand in will not be graded. 4. Make reasonable approximations and assumptions. State and justify any such assumptions and approximations you do make. 5. Be careful to include the correct units with your answers when appropriate. 6. Be certain that you have all thirteen (13) pages of this exam booklet and the six (6) page formula sheet, and make certain that you write your name at the top of this page in the space provided. 7. An effort has been made to make the various parts of these problems independent of each other so if you have difficulty with one item go on, and come back later. 8. You may see your graded final exam beginning June 1, 2006. 6.012 Staff Use Only PROBLEM 1 (out of a possible 25) PROBLEM 2 (out of a possible 25) PROBLEM 3 (out of a possible 25) PROBLEM 4 (out of a possible 25) TOTAL Page 1 of 13 YOUR NAME________________________________ Department of Electrical Engineering and Computer ScienceMassachusetts Institute of Technology 6.012 Electronic Devices and Circuits Final Exam Wednesday, May 24, 2006 1:30 to 4:30 pm Closed Book: Formula sheet provided; 3 sheets of notes permittedp' p' A: B: wBx x -wE 0 wB wB+wC -wE 0 wB+wC n' n' A: B: x x-wE 0 wB wB+wC -wE 0 wB wB+wC [ ] Bias Condition A [ ] Bias Condition B [ ] No difference Problem 1 continues on the next page Page 2 of 13 Problem 1 - (25 points) a) [4 pts] Consider a p+-n junction diode with NAp = 1018 cm-3 and NDn = 1016 cm-3, µ = e 1500 cm2/V-s, µh = 500 cm2/V-s, and Wp = Wn << Lmin. What is the largest component of the junction current with the following bias conditions? Explain. i) Forward bias, VAB = 0.6 V: [ ] Holes [ ] n-side to the p-side. moving from the [ ] Electrons [ ] p-side to the n-side. because ii) Reverse bias, VAB = - 2 V [ ] Holes [ ] n-side to the p-side. moving from the [ ] Electrons [ ] p-side to the n-side. because b) [6 pts] Consider a well designed npn bipolar junction transistor, with NDE = 4 NAB = 16 NDC and WC = 2WE = 4WB, under two bias conditions: Condition A is VBE = 0.6 V and VBC = 0 V, and Condition B is VBE = 0 V and VBC = 0.6 V. i) For which bias condition is the total number of injected excess minority carrierholes greatest? To explain why, sketch p' for each bias on the axes provided. . [ ] Bias Condition A [ ] Bias Condition B [ ] No difference ii) For which bias condition is the total number of injected excess minority carrierelectrons greatest? To explain why, sketch n' for each bias on the axes provided. .Page 3 of 13 Problem 1 continued c) [6 pts] Suppose that a minimum size CMOS inverter has an input capacitance CL, and can itself charge and discharge an identical linear capacitive load, CL, in 10 ns. i) How long does it take this same inverter to charge and discharge a linearcapacitive load 36 CL? Time to charge and discharge 36 CL: ns ii) Consider inserting a larger inverter between the minimum size inverter and the36 CL load in order to speed up the switching. What is the optimum size for thisinverter, and how long does it take your choice to charge and discharge the 36 CL load? Use only integer size multiples. Optimum size (multiple of minimum width): Time to charge and discharge 36 CL: ns d) [6 pts] Two emitter follower stages are used in otherwise identical multi-stageamplifiers in which they are biased in their forward active region with the samecollector current. Stage A is made using a bipolar transistor with βF = 200, and Stage B is made with a transistor for which βF = 50. i) Which emitter follower stage has the larger input resistance, and why? [ ] Stage A larger [ ] Stage B larger [ ] They are similar because ii) Which emitter follower stage has the larger output resistance, and why? [ ] Stage A larger [ ] Stage B larger [ ] They are similar because iii) For which emitter follower stage has voltage gain closer to one, and why? [ ] Stage A closer to 1 [ ] Stage B closer to 1 [ ] They are similar because Problem 1 continues on the next pagePage 4 of 13 Problem 1 continued e) [3 pts] An isolated n-type silicon sample with ND = 1017 cm-3, minority carrier lifetime, τmin, equal to 10-5 s, and perfectly reflecting boundaries (i.e., no surfacerecombination) has been illuminated for a long time with light generating 1020 hole-electron pairs/cm3-s uniformly throughout its bulk. At t = 0 the light is extinquished. What is the excess minority carrier density in this sample as afunction of time for t ≥ 0? . p'(t ≥ 0) = cm-3 End of Problem 1Page 5 of 13 Problem 2 (25 points) An ideal n-channel MOSFET has the iD vs vDS characteristic shown below when vGS = 4 V and vBS = 0 V. Note that the drain current saturates at 2 mA for vDS ≥ VDS,sat. The threshold voltage, VT(vBS) of this device is 1 V when vBS = 0 V, i.e. VT(0) = 1 V. It has the following structural parameters: NA = 1017 cm-3, W = 25 µm, L = 10 µm, t = 10-6 cm, and ε = 3.5 x 10-13 F/cm ox oxa) [3 pts] What is the drain-to-source saturation voltage, vDS,sat, when vGS = 4 V? vDS,sat = V b) [4 pts] Use the information provided to calculate the electron mobility, µe, in the channel. vDS,sat iD iD,sat = 2 mA vDS, vGS, = 4 V, vBS, = 0 V µ = cm2/V-s eProblem 2 continues on the next pagePage 6 of 13 Problem 2 continued c) [5 pts] Find the inversion layer sheet charge density in the channel, qN*(y), at the source end, i.e. qN*(0), and at the drain end, qN*(L), for the bias condition VGS = 4 V, VDS = 1 V, and VBS = 0 V. At the source end, qN*(0) = Coul/cm2 At the drain end, qN*(L) = Coul/cm2 d) [5 pts] Find the average net velocity, sy(y), of the electrons in the channel at the source end, i.e. sy(0), and at the drain end, sy(L), for the bias condition in Part (c)above, for which the corresponding drain current, ID, is 0.55 mA. If you could not solve Part (c) give an algebraic expression as your answer. At the source end, sy(0) = cm/s At the drain end, sy(L) = cm/s Problem 2 continues on the next pagePage 7 of 13 Problem 2 continued e) [5 pts] The
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